SN65LVP16DRFTG4 datasheet(2/15 Pages) TI

Part #	SN65LVP16DRFTG4

Description	2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS

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ABSOLUTE MAXIMUM RATINGS

DISSIPATION RATINGS

THERMAL CHARACTERISTICS

SN65LVDS16, SN65LVP16

SN65LVDS17, SN65LVP17

SLLS625B – SEPTEMBER 2004 – REVISED NOVEMBER 2005

These devices have limited built-in ESD protection. The leads should be shorted together or the device

placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

AVAILABLE OPTIONS(1)

INPUT

OUTPUT

GAIN CONTROL

BASE PART NUMBER

PART MARKING

Single-ended

LVDS

Yes

SN65LVDS16

EL

Single-ended

LVPECL

Yes

SN65LVP16

EK

Differential

LVDS

No

SN65LVDS17

EN

Differential

LVPECL

No

SN65LVP17

EM

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

over operating free-air temperature range (unless otherwise noted) (1)

UNIT

VCC

Supply voltage(2)

–0.5 V to 4 V

VI

Input voltage

–0.5 V to VCC + 0.5 V

VO

Output voltage

–0.5 V to VCC + 0.5 V

IO

VBB output current

±0.5 mA

HBM electrostatic discharge(3)

±3 kV

CDM electrostatic discharge(4)

±1500 V

Continuous power dissipation

See Power Dissipation Ratings Table

(1)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values, except differential voltages, are with respect to network ground see Figure 1).

(3)

Tested in accordance with JEDEC Standard 22, Test Method A114-A-7

(4)

Tested in accordance with JEDEC Standard 22, Test Method C101

TA≤ 25°C

DERATING FACTOR

TA = 85°C

PACKAGE

CIRCUIT BOARD MODEL

POWER RATING

ABOVE TA = 25°C(1)

POWER RATING

Low-K(2)

403 mW

4.0 mW/°C

161 mW

DRF

High-K(3)

834 mW

8.3 mW/°C

333 mW

(1)

This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.

(2)

In accordance with the Low-K thermal metric definitions of EIA/JESD51-3.

(3)

In accordance with the High-K thermal metric definitions of EIA/JESD51-7.

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VALUE

UNIT

θ

JB

Junction-to-board thermal resistance

93.3

°C/W

θ

JC

Junction-to-case thermal resistance

101.7

VCC = 3.3 V, TA = 25°C, 2 GHz, LVDS

132

Typical

VCC = 3.3 V, TA = 25°C, 2 GHz, LVPECL

83

PD

Device power dissipation

mW

VCC = 3.6 V, TA = 85°C, 2 GHz, LVDS

173

Maximum

VCC = 3.6 V, TA = 85°C, 2 GHz, LVPECL

108

2

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