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IDT74ALVCF162835APA Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDT74ALVCF162835APA Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 6 page INDUSTRIALTEMPERATURERANGE 4 IDT74ALVCF162835A 3.3V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS OPERATING CHARACTERISTICS, TA = 25°C VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Symbol Parameter Test Conditions Typical Typical Unit CPD PowerDissipationCapacitanceOutputsenabled CL = 0pF, f = 10Mhz 30 35 pF CPD PowerDissipationCapacitanceOutputsdisabled 12.5 14 NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C. 2. Skew between any two outputs of the same package and switching in the same direction. SWITCHING CHARACTERISTICS(1) VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V Symbol Parameter Min. Max. Min. Max. Min. Max. Unit fCLOCK 150 — 150 — 150 — MHz tPLH PropagationDelay 1 4 — 4.6 1 3.5 ns tPHL Ax to Yx tPLH PropagationDelay 1.3 5.5 — 5.4 1.3 4.6 ns tPHL LE to Yx tPLH PropagationDelay 1.4 5.9 — 5.6 1.4 3.5 ns tPHL CLK to Yx tPZH OutputEnableTime 1.4 5.9 — 6 1.1 5 ns tPZL OE to Yx tPHZ OutputDisableTime 1 4.7 — 4.6 1.3 4.2 ns tPLZ OE to Yx tW Pulse Duration, LE HIGH 3.3 — 3.3 — 3.3 — ns tW Pulse Duration, CLK HIGH or LOW 3.3 — 3.3 — 3.3 — ns tSU Set-upTime,databeforeCLK ↑ 1.8 — 1.5 — 1 — ns tSU Set-up Time, data before LE ↓, CLK HIGH 1.9 — 1.6 — 1.5 — ns tSU Set-up Time, data before LE ↓, CLK LOW 1.3 — 1.1 — 1 — ns tH Hold Time, data after CLK ↑ 0.6 — 0.6 — 0.6 — ns tH Hold Time, data after LE ↓, CLK HIGH or LOW 1.4 — 1.7 — 1.4 — ns tSK(O) OutputSkew(2) —— — — — 500 ps SWITCHING CHARACTERISTICS FROM 0°C TO 65°C, CL = 50pF VCC = 3.3V ± 0.15V Symbol Parameter Min. Max. Unit tPLH PropagationDelay 1.8 3.5 ns tPHL CLK to xYx |
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