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Si306x
Preliminary Rev. 0.9
11
5. AOUT PWM Output
Figure 3 illustrates an optional circuit to support the pulse width modulation (PWM) output capability of the Si306x
for call progress monitoring purposes. To enable this mode, the INTE bit (Register 2) should be set to 0, the PWME
bit (Register 1) set to 1, and the PWMM bits (Register 1) set to 00.
Figure 3. AOUT PWM Circuit for Call Progress
Registers 20 and 21 allow the receive and transmit paths to be attenuated linearly. When these registers are set to
all 0s, the receive and transmit paths are muted. These registers affect the call progress output only and do not
affect transmit and receive operations on the telephone line.
The PWMM[1:0] bits (Register 1, bits 5:4) select one of the three different PWM output modes for the AOUT signal,
including a delta-sigma data stream, a 32 kHz return to zero PWM output, and balanced 32 kHz PWM output.
Table 6. Component Values—AOUT PWM
Component
Value
Supplier
LS1
Speaker BRT1209PF-06
Intervox
Q6
NPN KSP13
Fairchild
C41
0.1 µF, 16 V, X7R, ±20%
Venkel, SMEC
R41
150
Ω, 1/16 W, ±5%
Venkel, SMEC, Panasonic
+5 VA
LS1
Q6
NPN
R41
C41
AOUT