CY7C1312AV18 datasheet(2/21 Pages) CYPRESS

Part #	CY7C1312AV18

Description	18-Mb QDR-II SRAM 2-Word Burst Architecture

Download	21 Pages

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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2 / 21 page

CY7C1310AV18

CY7C1312AV18

CY7C1314AV18

PRELIMINARY

Document #: 38-05497 Rev. *A

Page 2 of 21

Selection Guide

167 MHz

133 MHz

Unit

Maximum Operating Frequency

167

133

MHz

Maximum Operating Current

800

700

mA

Logic Block Diagram (CY7C1312AV18)

CLK

A(18:0)

Gen.

K

Control

Logic

Address

Register

D[17:0]

Read Data Reg.

RPS

WPS

Q[17:0]

Control

Logic

Address

Register

Reg.

18

19

18

36

18

BWS[1:0]

VREF

18

A(18:0)

19

C

18

Write

Reg

Write

Reg

CQ

18

DOFF

Logic Block Diagram (CY7C1314AV18)

CLK

A(17:0)

Gen.

K

Control

Logic

Address

Register

D[35:0]

Read Data Reg.

RPS

WPS

Q[35:0]

Control

Logic

Address

Register

Reg.

36

18

36

72

36

BWS[3:0]

VREF

36

A(17:0)

18

C

36

Write

Reg

Write

Reg

CQ

36

DOFF

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Similar Description - CY7C1312AV18

Manufacturer	Part #	Datasheet	Description
Cypress Semiconductor	CY7C1310BV18	1Mb / 28P	18-Mbit QDR??II SRAM 2 Word Burst Architecture
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CY7C1312AV18 Datasheet(PDF) 2 Page - Cypress Semiconductor

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