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CY7C1310AV18-167BZC Datasheet(PDF) 8 Page - Cypress Semiconductor

Part # CY7C1310AV18-167BZC
Description  18-Mb QDR-II SRAM 2-Word Burst Architecture
Download  21 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1310AV18-167BZC Datasheet(HTML) 8 Page - Cypress Semiconductor

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CY7C1310AV18
CY7C1312AV18
CY7C1314AV18
PRELIMINARY
Document #: 38-05497 Rev. *A
Page 8 of 21
Write Cycle Descriptions (CY7C1310AV18 and CY7C1312AV18) [2, 8]
BWS0 BWS1
KK
Comments
L
L
L-H
During the Data portion of a Write sequence
:
CY7C1310AV18
− both nibbles (D[7:0]) are written into the device,
CY7C1312AV18
− both bytes (D[17:0]) are written into the device.
L
L
L-H During the Data portion of a Write sequence
:
CY7C1310AV18
− both nibbles (D[7:0]) are written into the device,
CY7C1312AV18
− both bytes (D[17:0]) are written into the device.
L
H
L-H
During the Data portion of a Write sequence
:
CY7C1310AV18
− only the lower nibble (D[3:0]) is written into the device. D[7:4] will remain unaltered,
CY7C1312AV18
− only the lower byte (D[8:0]) is written into the device. D[17:9] will remain unaltered.
L
H
L-H During the Data portion of a Write sequence
:
CY7C1310AV18
− only the lower nibble (D[3:0]) is written into the device. D[7:4] will remain unaltered,
CY7C1312AV18
− only the lower byte (D[8:0]) is written into the device. D[17:9] will remain unaltered.
H
L
L-H
During the Data portion of a Write sequence
:
CY7C1310AV18
− only the upper nibble (D[7:4]) is written into the device. D[3:0] will remain unaltered,
CY7C1312AV18
− only the upper byte (D[17:9]) is written into the device. D[8:0] will remain unaltered.
H
L
L-H During the Data portion of a Write sequence
:
CY7C1310AV18
− only the upper nibble (D[7:4]) is written into the device. D[3:0] will remain unaltered,
CY7C1312AV18
− only the upper byte (D[17:9]) is written into the device. D[8:0] will remain unaltered.
H
H
L-H
No data is written into the devices during this portion of a write operation.
H
H
L-H No data is written into the devices during this portion of a write operation.
Write Cycle Descriptions (CY7C1314AV18) [2, 8]
BWS0 BWS1 BWS2 BWS3
KK
Comments
L
L
L
L
L-H
-
During the Data portion of a Write sequence, all four bytes (D[35:0]) are written into
the device.
L
L
L
L
-
L-H During the Data portion of a Write sequence, all four bytes (D[35:0]) are written into
the device.
L
H
H
H
L-H
-
During the Data portion of a Write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] will remain unaltered.
L
H
H
H
-
L-H During the Data portion of a Write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] will remain unaltered.
H
L
H
H
L-H
-
During the Data portion of a Write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] will remain unaltered.
H
L
H
H
-
L-H During the Data portion of a Write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] will remain unaltered.
H
H
L
H
L-H
-
During the Data portion of a Write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] will remain unaltered.
H
H
L
H
-
L-H During the Data portion of a Write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] will remain unaltered.
H
H
H
L
L-H
During the Data portion of a Write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] will remain unaltered.
H
H
H
L
-
L-H During the Data portion of a Write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] will remain unaltered.
H
H
H
H
L-H
-
No data is written into the device during this portion of a write operation.
H
H
H
H
-
L-H No data is written into the device during this portion of a write operation.


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