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UPD30181A Datasheet(PDF) 10 Page - NEC |
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UPD30181A Datasheet(HTML) 10 Page - NEC |
10 / 72 page Data Sheet U16277EJ1V0DS 10 µµµµPD30181A, 30181AY 1. PIN FUNCTIONS Remark # indicates active low. 1.1 Pin Functions (1) System bus interface signals (1/3) Signal Name I/O Function Alternate Function A24 O CKE1 A23 O RP# A(22:15) O Address bus These pins are used to specify system bus addresses. They are used to access ROM, flash memory, SRAM, ISA devices, PC Cards, IDE (ATA) devices, and general-purpose devices. GPIO(61:54) SA10 O Address bit 10 for SDRAM or SyncFlash memory Instead of connecting to A10, connect this pin (SA10) to address bit 10 in SDRAM or SyncFlash memory. – A(14:0) O Address bus These pins are used to specify system bus addresses. They are used to access SDRAM, SyncFlash memory, ROM, flash memory, SRAM, ISA devices, CompactFlash/PC Cards, IDE (ATA) devices, and general-purpose devices. – D(31:0) I/O Data bus These pins are used to transfer data to the VR4181A and SDRAM, SyncFlash memory, ROM, flash memory, SRAM, ISA devices, CompactFlash/PC Cards, IDE (ATA) devices, and general-purpose devices. – PCS(4:0)# O Programmable chip select These pins can be set as active when the VR4181A accesses ROM, flash memory, SRAM, and general-purpose devices. They can be connected only to devices that are not subject to bus sizing via the IOCS16# pin. – ROMCS# O Boot ROM chip select This pin can be set as active when the VR4181A accesses boot ROM or flash memory. When the BMODE(1:0) pin status is 01 and the RTCRST# signal has been cleared, the VR4181A fetches the boot code from a device connected to the ROMCS# pin to activate this pin. – MEMRD# O System bus memory read This pin becomes active when the VR4181A reads data from any of the following devices. • ROM, flash memory, SRAM, or general-purpose devices controlled by the ROMCS# pin or PCS# pin • External ISA bus memory space devices and CompactFlash/PC Card memory space devices – |
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