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HDSP2001LP Datasheet(PDF) 6 Page - Infineon Technologies AG |
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HDSP2001LP Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 7 page 2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA HDSP200LP/1LP/2LP/3LP www.infineon.com/opto • 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany www.osram-os.com • +49-941-202-7178 6 April 4, 2000-11 Thermal Considerations The small alphanumeric displays are hybrid LED and CMOS assemblies that are designed for reliable operation in commer- cial, industrial, and military environments. Optimum reliability and optical performance will result when the junction tempera- ture of the LEDs and CMOS ICs are kept as low as possible. Thermal Modeling HDSP200XLP displays consist of two driver ICs and four 5 x 7 LED matrixes. A thermal model of the display is shown in Fig- ure 5. It illustrates that the junction temperature of the semi- conductor = junction self heating + the case temperature rise + the ambient temperature. Equation 1 shows this relationship. Figure 5. Thermal model See Equation 1 below. The junction rise within the LED is the product of the thermal impedance of an individual LED (37 °C/W, DF=20%, F=200 Hz), times the forward voltage, VF(LED), and forward current IF(LED), of 13–14.5 mA. This rise averages TJ(LED)=1°C. The table below shows the VF(LED) for the respective displays. The junction rise within the LED driver IC is the combination of the power dissipated by the IC quiescent current and the 28 row driver current sinks. The IC junction rise is given in Equation 2. A thermal resistance of 28 °C/W results in a typical junction rise of 6 °C. Model Number VF Min. Typ. Max. HDSP2000LP 1.6 1.7 2.0 HDSP2001/2/3LP 1.9 2.2 3.0 LED T 1 IC T 2 LED T 1 LED T 1 IC T 2 LED T 1 LED Power IC Power LED Power LED Power IC Power LED Power RθCA Rθ1 Rθ1 Rθ1 Rθ1 Rθ2 Rθ2 For ease of calculations the maximum allowable electrical oper- ating condition is dependent upon the aggregate thermal resis- tance of the LED matrixes and the two driver ICs. All of the thermal management calculations are based upon the parallel combination of these two networks which is 15 °C/W. Maxi- mum allowable power dissipation is given in Equation 3. Equation 3. For further reference see Figures 2, 7, 8, 9, 10 and 11. Key to equation symbols DF Duty factor ICC Quiescent IC current ICOL Column current n Number of LEDs on in a 5 x 7 array PCASE Package power dissipation excluding LED under consideration PCOL Power dissipation of a column PDISPLAY Power dissipation of the display PLED Power dissipation of a LED RθCA Thermal resistance case to ambient RθJC Thermal resistance junction to case TA Ambient temperature TJ(IC) Junction temperature of an IC TJ(LED) Junction temperature of a LED TJ(MAX) Maximum junction temperature VCC IC voltage VCOL Column voltage VF(LED) Forward voltage of LED ZθJC Thermal impedance junction to case Optical Considerations The light output of the LEDs is inversely related to the LED diode’s junction temperature as shown in Figure 6. For opti- mum light output, keep the thermal resistance of the socket or PC board as low as possible. P DISPLAY T J MAX () TA – RθJC RθCA + --------------------------------- = P DISPLAY 5V COL ICOL n35 ⁄ () DF V CC ICC + = See Equation 2 below. Equation 1. Equation 2. T J LED () P LED Z θJC P CASE RθJC RθCA + () T A ++ = T J LED () I COL 28 ⁄ ()V F LED () ZθJC [] n35 ⁄ ()I COL DF 5VCOL () V CC ICC + [] RθJC RθCA + [] T A + ⋅ + = T JIC () P COL R θJC RθCA + () T A + = T JIC () 5V COL V F LED () – () I COL 2 ⁄ () n35 ⁄ ()DF ⋅⋅ V CC I CC ⋅ + [] RθJC RθCA + [] ⋅ T A + = |
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