PC133/PC100 Unbuffered DIMM

M366S3253CTS

REV. 0.1 Sept. 2001

The Samsung M366S3253CTS is a 32M bit x 64 Synchronous

Dynamic RAM high density memory module. The Samsung

M366S3253CTS consists of eight CMOS 32M x 8 bit with 4banks

Synchronous DRAMs in TSOP-II 400mil package and a

2K

EEPROM in 8-pin TSSOP package on a 168-pin glass-epoxy sub-

strate. Two 0.1uF decoupling capacitors are mounted on the

printed circuit board in parallel for each SDRAM.

The M366S3253CTS is a Dual In-line Memory Module and is

intended for mounting into 168-pin edge connector sockets.

Synchronous design allows precise cycle control with the use of

system clock. I/O transactions are possible on every clock cycle.

Range of operating frequencies, programmable latencies allows

the same device to be useful for a variety of high bandwidth, high

performance memory system applications.

• Performance range

• Burst mode operation

• Auto & self refresh capability (8192 Cycles/64ms)

• LVTTL compatible inputs and outputs

• Single 3.3V

± 0.3V power supply

• MRS cycle with address key programs

Latency (Access from column address)

Burst length (1, 2, 4, 8 & Full page)

Data scramble (Sequential & Interleave)

• All inputs are sampled at the positive going edge of the

system clock

• Serial presence detect with EEPROM

• PCB : Height (1,375mil), single sided component

Part No.

Max Freq. (Speed)

M366S3253CTS-L7C/C7C

133MHz (7.5ns@CL=2)

M366S3253CTS-L7A/C7A

133MHz (7.5ns@CL=3)

M366S3253CTS-L1H/C1H

100MHz (6.0ns@CL=2)

M366S3253CTS-L1L/C1L

100MHz (6.0ns@CL=3)

FEATURE

GENERAL DESCRIPTION

M366S3253CTS SDRAM DIMM

32Mx64 SDRAM DIMM based on 32Mx8, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD

PIN NAMES

*

These pins are not used in this module.

** These pins should be NC in the system

which does not support SPD.

Pin Name

Function

A0 ~ A12

Address input (Multiplexed)

BA0 ~ BA1

Select bank

DQ0 ~ DQ63

Data input/output

CLK0, CLK2

Clock input

CKE0

Clock enable input

CS0, CS2

Chip select input

RAS

Row address strobe

CAS

Column address strobe

WE

Write enable

DQM0 ~ 7

DQM

Power supply (3.3V)

Ground

Power supply for reference

SDA

Serial data I/O

SCL

Serial clock

SA0 ~ 2

Address in EEPROM

*WP

Write protection

DU

Don

′t use

NC

No connection

PIN CONFIGURATIONS (Front side/back side)

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

Front

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

*CB0

*CB1

NC

NC

WE

DQM0

Pin

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

Front

DQM1

CS0

DU

A0

A2

A4

A6

A8

A10/AP

BA1

CLK0

DU

CS2

DQM2

DQM3

DU

NC

NC

*CB2

*CB3

DQ16

DQ17

Pin

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

Front

DQ18

DQ19

DQ20

NC

*CKE1

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

CLK2

NC

*WP

**SDA

**SCL

Pin

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

112

Back

DQ32

DQ33

DQ34

DQ35

DQ36

DQ37

DQ38

DQ39

DQ40

DQ41

DQ42

DQ43

DQ44

DQ45

DQ46

DQ47

*CB4

*CB5

NC

NC

CAS

DQM4

Pin

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

Back

DQM5

*CS1

RAS

A1

A3

A5

A7

A9

BA0

A11

*CLK1

A12

CKE0

*CS3

DQM6

DQM7

*A13

NC

NC

*CB6

*CB7

DQ48

DQ49

Pin

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

161

162

163

164

165

166

167

168

Back

DQ50

DQ51

DQ52

NC

NC

DQ53

DQ54

DQ55

DQ56

DQ57

DQ58

DQ59

DQ60

DQ61

DQ62

DQ63

*CLK3

NC

**SA0

**SA1

**SA2

SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.