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IDT74GTLP16612PA Datasheet(PDF) 5 Page - Integrated Device Technology |
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IDT74GTLP16612PA Datasheet(HTML) 5 Page - Integrated Device Technology |
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5 / 8 page  5 IDT74GTLP16612 CMOS 18-BIT TTL/GTLP UNIVERSAL BUS TRANSCEIVER INDUSTRIALTEMPERATURERANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE (1,2) IDT74GTLP16612 Symbol Parameter Min. Typ.(3) Max. Unit fCLOCK Max Clock Frequency 175 — — MHz tW Pulse Duration, LEAB or LEBA HIGH 3 — — ns tW Pulse Duration, CLKAB or CLKBA HIGH or LOW 3.2 — — tS Setup Time, Ax before CLKAB ↑ 0.5 — — tS Setup Time, Bx before CLKBA ↑ 3.1 — — tS Setup Time, Ax before LEAB ↓ 1.3 — — ns tS Setup Time, Bx before LEBA ↓ 3.7 — — tS Setup Time, CEAB before CLKAB ↑ 0.4 — — tS Setup Time, CEBA beforeCLKBA ↑ 1— — tH Hold Time, Ax after CLKAB ↑ 1.5 — — tH Hold Time, Bx after CLKBA ↑ 0— — tH Hold Time, Ax after LEAB ↓ 0.5 — — ns tH Hold Time, Bx after LEBA ↓ 0— — tH Hold Time, CEAB after CLKAB ↑ 1.5 — — tH Hold Time, CEBA afterCLKBA ↑ 1.7 — — tPLH Ax to Bx 1 4.3 6.5 ns tPHL 1 5 8.2 tPLH LEAB to Bx 1.8 4.5 6.7 ns tPHL 1.5 5.3 8.6 tPLH CLKAB to Bx 1.8 4.6 6.7 ns tPHL 1.5 5.4 8.7 tPLH OEAB to Bx 1.6 4.4 6.2 ns tPHL 1.3 6.1 9.8 tRISE Transition Time, B outputs (20% to 80%) — 2.6 — ns tFALL tPLH Bx to Ax 2 5.6 8.2 ns tPHL 1.4 5 7.2 tPLH LEBA to Ax 2.1 4.2 6.3 ns tPHL 1.9 3.3 5 tPLH CLKBA to Ax 2.3 4.4 6.8 ns tPHL 2.2 3.5 5.2 tPZH OEBA to Ax 1.5 5 6.2 tPZL tPHZ 1.9 3.9 7.9 ns tPLZ NOTES: 1. See Test Circuits and Waveforms. TA = –40°C to +85°C. 2. Unless otherwise noted, VREF = 1V, CL = 30pF for B-Port, and CL = 50pF for A-Port. 3. Typical values are at VCC = 3.3V, VCCQ = 5V, and TA = 25°C. |
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