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EN29LV641H-90 Datasheet(PDF) 11 Page - Eon Silicon Solution Inc. |
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EN29LV641H-90 Datasheet(HTML) 11 Page - Eon Silicon Solution Inc. |
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11 / 46 page  This Data Sheet may be revised by subsequent versions ©2005 Eon Silicon Solution, Inc., www.essi.com.tw or modifications due to changes in technical specifications. 11 EN29LV641H/L EN29LV640U Rev. B, Issue Date: 2005/06/27 data with the same exception. See “Sector Erase Suspend/Resume Commands” for more additional information. The system must issue the reset command to re-enable the device for reading array data if DQ5 goes high or while in the autoselect mode. See the “Reset Command” for additional details. Output Disable Mode When the OE# pin is at a logic high level (V B IHB), the output from the device is disabled. The output pins are placed in a high impedance state. Standby Mode The device has a CMOS-compatible standby mode, which reduces the B current to < 1µA (typical). It is placed in CMOS-compatible standby when the CE# pin is at V B CCB ± 0.5. RESET# and BYTE# pin must also be at CMOS input levels. The device also has a TTL-compatible standby mode, which reduces the maximum V B CC Bcurrent to < 1mA. It is placed in TTL-compatible standby when the CE# pin is at V B IHB. When in standby modes, the outputs are in a high-impedance state independent of the OE# input. Automatic Sleep Mode The device has an automatic sleep mode, which minimizes power consumption. The devices will enter this mode automatically when the states of address bus remain stable for tacc + 30ns. ICC4 in the DC Characteristics table shows the current specification. With standard access times, the device will output new data when addresses change. Writing Command Sequences To write a command or command sequence to program data to the device or erase data, the system has to drive WE# and CE# to V B IL, and OE# to VBIHB. The device has an Unlock Bypass mode to facilitate faster programming. Once the device enters the Unlock Bypass mode, only two write cycles are required to program a word, instead of four. The system can also read the autoselect codes by entering the autoselect mode, which need the autoselect command sequence to be written. Please refer to the “Command Definitions” for all the available commands. Autoselect Identification Mode The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ15–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding programming algorithm. However, the autoselect codes can also be accessed in-system through the command register. When using programming equipment, the autoselect mode requires V B IDB (10.5 V to 11.5 V) on address pin A9. Address pins A6, A1, and A0 must be as shown in Autoselect Codes table. In addition, when verifying sector group protection, the sector group address must appear on the appropriate highest order address bits. Refer to the corresponding Sector Address Tables. The “Command Definitions” table shows the remaining address bits that are don’t-care. When all necessary bits have been set as required, the programming equipment may then read the corresponding identifier code on DQ15–DQ0. To access the autoselect codes in-system; the host system can issue the autoselect command via the command register, as shown in the Command Definitions table. This method does not require V B IDB. See “Command Definitions” for details on using the autoselect mode. Note that a Reset command is required to return to read mode when the device is in the autoselect mode. |
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