Philips Semiconductors

Product specification

80C562/83C562

Single-chip 8-bit microcontroller

1992 Jan 08

6

OSCILLATOR

CHARACTERISTICS

XTAL1 and XTAL2 are the input and output,

respectively, of an inverting amplifier. The

pins can be configured for use as an on-chip

oscillator, as shown in the logic symbol.

To drive the device from an external clock

source, XTAL1 should be driven while XTAL2

is left unconnected. There are no

requirements on the duty cycle of the

external clock signal, because the input to

the internal clock circuitry is through a

divide-by-two flip-flop. However, minimum

and maximum high and low times specified in

the data sheet must be observed.

RESET

A reset is accomplished by holding the RST

pin high for at least two machine cycles (24

oscillator periods), while the oscillator is

running. To ensure a good power-on reset,

the RST pin must be high long enough to

allow the oscillator time to start up (normally

a few milliseconds) plus two machine cycles.

must come up at the same time for a proper

start-up.

IDLE MODE

In the idle mode, the CPU puts itself to sleep

while all of the on-chip peripherals stay

active. The instruction to invoke the idle

mode is the last instruction executed in the

normal operating mode before the idle mode

is activated. The CPU contents, the on-chip

RAM, and all of the special function registers

remain intact during this mode. The idle

mode can be terminated either by any

enabled interrupt (at which time the process

is picked up at the interrupt service routine

and continued), or by a hardware reset which

starts the processor in the same manner as a

power-on reset.

POWER-DOWN MODE

In the power-down mode, the oscillator is

stopped and the instruction to invoke

power-down is the last instruction executed.

Only the contents of the on-chip RAM are

preserved. A hardware reset is the only way

to terminate the power-down mode. the

control bits for the reduced power modes are

in the special function register PCON. Table 1

shows the state of the I/O ports during low

current operating modes.

Table 1.

External Pin Status During Idle and Power-Down Modes

MODE

PROGRAM

MEMORY

ALE

PSEN

PORT 0

PORT 1

PORT 2

PORT 3

PORT 4

PWM0/

PWM1

Idle

Internal

1

1

Data

Data

Data

Data

Data

High

Idle

External

1

1

Float

Data

Address

Data

Data

High

Power-down

Internal

0

0

Data

Data

Data

Data

Data

High

Power-down

External

0

0

Float

Data

Data

Data

Data

High

PARAMETER

RATING

UNIT

–0.5 to +6.5

V

Input, output DC current on any single I/O pin

5.0

mA

Power dissipation (based on package heat transfer limitations, not device power consumption)

1.0

W

Storage temperature range

–65 to +150

°C

NOTES:

1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and

functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section

of this specification is not implied.

2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static

charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.

noted.