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P80C51HFH Datasheet(PDF) 10 Page - NXP Semiconductors |
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P80C51HFH Datasheet(HTML) 10 Page - NXP Semiconductors |
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10 / 40 page  Philips Semiconductors Product specification 80CL31/80CL51 Low-voltage single-chip 8-bit microcontrollers January 1995 10 Timer 0 and Timer 1 can be independently programmed to operate as follows: Mode 0 - 8-bit timer or counter with divide-by-32 prescaler Mode 1 - 16-bit time-interval or event counter Mode 2 - 8-bit time interval or event counter with automatic reload upon overflow Mode 3 - Timer 0 establishes TL0 and TH0 as two separate counters. In the “Timer” function, the register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency. In the “Counter” function, the register is incremented in response to a 1-to-0 transition. Since it takes 2 machine cycles (24 oscillator periods) to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure a given level is sampled, it should be held for at least one full machine cycle. 1.4 Idle and Power-down operation Idle mode operation permits the interrupt, serial port and timer blocks to continue functioning while the clock to the CPU is halted. The following functions remain active during Idle mode: – Timer 0, Timer 1 – UART – External interrupt The Power-down operation freezes the oscillator. The Power-down mode can only be activated by setting the PD bit in the PCON register. 1.4.1 Power control register Power-down and Idle modes are activated by software via the Special Function Register PCON. Its hardware address is 87H. PCON is byte addressable only. PCON BIT POSITION FUNCTION SMOD PCON.7 PCON.4-PCON.6 Double baud-rate bit, see description of the UART, chapter 1.5. (reserved) GF1 PCON.3 General purpose flag bit GFO PCON.2 General purpose flag bit PD PCON.1 Power-down activation bit IDL PCON.0 Idle mode activation bit Figure 4. Idle and Power-down Hardware XTAL2 XTAL1 OSCILLATOR CLOCK GENERATOR INPUTS SERIAL PORTS TIMER BLOCKS CPU IDL PD |
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