2

8Mb: 512K x 18, 256K x 32/36 3.3V I/O, Pipelined, DCD SyncBurst SRAM

Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT58L512L18D_2.p65 – Rev. 8/00

©2000, Micron Technology, Inc.

8Mb: 512K x 18, 256K x 32/36

3.3V I/O, PIPELINED, DCD SYNCBURST SRAM

FUNCTIONAL BLOCK DIAGRAM

512K x 18

SA0, SA1, SA

ADDRESS

REGISTER

ADV#

CLK

BINARY

COUNTER AND

LOGIC

CLR

Q1

Q0

ADSC#

18

18

16

18

BWb#

BWa#

CE#

18

BYTE “b”

WRITE REGISTER

BYTE “a”

WRITE REGISTER

ENABLE

REGISTER

18

SA0'

SA1'

OE#

SENSE

AMPS

256K x 9 x 2

MEMORY

ARRAY

ADSP#

9

9

2

SA0-SA1

MODE

CE2

CE2#

GW#

BWE#

PIPELINED

ENABLE

DQs

DQPa

DQPb

2

18

OUTPUT

REGISTERS

INPUT

REGISTERS

18

E

18

BYTE “b”

WRITE DRIVER

BYTE “a”

WRITE DRIVER

OUTPUT

BUFFERS

9

9

NOTE: Functional block diagrams illustrate simplified device operation. See truth tables, pin descriptions, and timing diagrams for

detailed information.

FUNCTIONAL BLOCK DIAGRAM

256K x 32/36

ADDRESS

REGISTER

ADV#

CLK

BINARY

COUNTER

CLR

Q1

Q0

ADSP#

ADSC#

MODE

17

17

17

BWd#

BWc#

BWb#

BWa#

BWE#

GW#

CE#

CE2

CE2#

OE#

BYTE “d”

WRITE REGISTER

BYTE “c”

WRITE REGISTER

BYTE “b”

WRITE REGISTER

BYTE “a”

WRITE REGISTER

ENABLE

REGISTER

PIPELINED

ENABLE

4

OUTPUT

REGISTERS

SENSE

AMPS

128K x 8 x 4

(x32)

128K x 9 x 4

(x36)

MEMORY

ARRAY

OUTPUT

BUFFERS

E

BYTE “a”

WRITE DRIVER

BYTE “b”

WRITE DRIVER

BYTE “c”

WRITE DRIVER

BYTE “d”

WRITE DRIVER

INPUT

REGISTERS

SA0, SA1, SA

SA0'

SA1'

SA0-SA1

DQs

DQPa

DQPd

9

36

36

36

36

36

9

9

9

9

9

9

9