3

8Mb: 512K x 18, 256K x 32/36 Flow-Through SyncBurst SRAM

Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT58L512L18F_2.p65 – Rev. 7/00

©2000, Micron Technology, Inc.

8Mb: 512K x 18, 256K x 32/36

FLOW-THROUGH SYNCBURST SRAM

ADV#), byte write enables (BWx#) and global write

(GW#). Note that CE2# is not available on the

T Version.

Asynchronous inputs include the output enable

(OE#), clock (CLK) and snooze enable (ZZ). There is also

a burst mode input (MODE) that selects between inter-

leaved and linear burst modes. The data-out (Q), en-

abled by OE#, is also asynchronous. WRITE cycles can

be from one to two bytes wide (x18) or from one to four

bytes wide (x32/x36), as controlled by the write control

inputs.

Burst operation can be initiated with either address

status processor (ADSP#) or address status controller

(ADSC#) inputs. Subsequent burst addresses can be

internally generated as controlled by the burst advance

input (ADV#).

Address and write control are registered on-chip to

simplify WRITE cycles. This allows self-timed WRITE

cycles. Individual byte enables allow individual bytes

to be written. During WRITE cycles on the x18 device,

BWa# controls DQa’s and DQPa; BWb# controls DQb’s

and DQPb. During WRITE cycles on the x32 and x36

GENERAL DESCRIPTION (continued)

devices, BWa# controls DQa’s and DQPa; BWb# con-

trols DQb’s and DQPb; BWc# controls DQc’s and DQPc;

BWd# controls DQd’s and DQPd. GW# LOW causes all

bytes to be written. Parity bits are only available on the

x18 and x36 versions.

Micron’s 8Mb SyncBurst SRAMs operate from a

TTL-compatible. Users can choose either a 3.3V or 2.5V

I/O version. The device is ideally suited for 486,

tems that benefit from a wide synchronous data bus.

The device is also ideal in generic 16-, 18-, 32-, 36-, 64-,

and 72-bit-wide applications.

Please

refer

to

Micron’S

Web

site

(www.micronsemi.com/datasheets/syncds.html) for the

latest data sheet.

TQFP PINOUTS

At the time of the writing of this data sheet, there are

two pinouts in the industry. Micron will support both

pinouts for this part.