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MSP430F2012 Datasheet(PDF) 9 Page - Texas Instruments |
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MSP430F2012 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 80 page MSP430x20x1, MSP430x20x2, MSP430x20x3 MIXED SIGNAL MICROCONTROLLER SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions, MSP430x20x2 (Continued) TERMINAL NAME PW, or N RSA I/O DESCRIPTION NAME NO. NO. I/O DESCRIPTION DVCC NA 16 Digital supply voltage AVCC NA 15 Analog supply voltage DVSS NA 14 Digital ground reference AVSS NA 13 Analog ground reference QFN Pad NA Package Pad NA QFN package pad connection to VSS recommended. † TDO or TDI is selected via JTAG instruction. NOTE: If XOUT/P2.7 is used as an input, excess current will flow until P2SEL.7 is cleared. This is due to the oscillator output driver connection to this pad after reset. Terminal Functions, MSP430x20x3 TERMINAL NAME PW, or N RSA I/O DESCRIPTION NAME NO. NO. I/O DESCRIPTION P1.0/TACLK/ACLK/A0+ 2 1 I/O General-purpose digital I/O pin Timer_A, clock signal TACLK input ACLK signal ouput SD16_A positive analog input A0 P1.1/TA0/A0−/A4+ 3 2 I/O General-purpose digital I/O pin Timer_A, capture: CCI0A input, compare: Out0 output SD16_A negative analog input A0 SD16_A positive analog input A4 P1.2/TA1/A1+/A4− 4 3 I/O General-purpose digital I/O pin Timer_A, capture: CCI1A input, compare: Out1 output SD16_A positive analog input A1 SD16_A negative analog input A4 P1.3/VREF/A1− 5 4 I/O General-purpose digital I/O pin Input for an external reference voltage/internal reference voltage output (can be used as mid-voltage) SD16_A negative analog input A1 P1.4/SMCLK/A2+/TCK 6 5 I/O General-purpose digital I/O pin SMCLK signal output SD16_A positive analog input A2 JTAG test clock, input terminal for device programming and test P1.5/TA0/A2−/SCLK/TMS 7 6 I/O General-purpose digital I/O pin Timer_A, compare: Out0 output SD16_A negative analog input A2 USI: external clock input in SPI or I2C mode; clock output in SPI mode JTAG test mode select, input terminal for device programming and test P1.6/TA1/A3+/SDO/SCL/TDI/TCLK 8 7 I/O General-purpose digital I/O pin Timer_A, capture: CCI1B input, compare: Out1 output SD16_A positive analog input A3 USI: Data output in SPI mode; I2C clock in I2C mode JTAG test data input or test clock input during programming and test P1.7/A3−/SDI/SDA/TDO/TDI† 9 8 I/O General-purpose digital I/O pin SD16_A negative analog input A3 USI: Data input in SPI mode; I2C data in I2C mode JTAG test data output terminal or test data input during programming and test |
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