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TMS626162A Datasheet(PDF) 10 Page - Texas Instruments |
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TMS626162A Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 44 page  TMS626162A 524288 BY 16-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS692B – JULY 1997 – REVISED MARCH 1998 10 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 refresh The ’626162A must be refreshed such that all 4 096 rows are access within tREF (see timing requirements) or data cannot be retained. Refresh can be accomplished by performing a series of ACTV and DEAC to every row in both banks, 4 096 auto-refresh (REFR) commands, or by placing the device in self-refresh mode. Regardless of the method used, all rows must be refreshed before tREF has expired. auto refresh (REFR) Before performing a REFR, both banks must be deactivated (placed in precharge). To enter a REFR command, RAS and CAS must be low and W must be high upon the rising edge of CLK (see Table 1). The refresh address is generated internally such that, after 4 096 REFR commands, both banks of the ’626162A have been refreshed. The external address and bank select (A11) are ignored. The execution of a REFR command automatically deactivates both banks upon completion of the internal auto-refresh cycle, allowing consecutive REFR-only commands to be executed, if desired, without any intervening DEAC commands. The REFR commands do not necessarily have to be consecutive, but all 4 096 must be completed before tREF expires. self refresh (SLFR) To enter self refresh, both banks of the ’626162A must be deactivated and then a self-refresh (SLFR) command must be executed (see Table 2). The SLFR command is identical to the REFR command, except that CKE is low. For proper entry of the SLFR command, CKE is brought low for the same rising edge of CLK that RAS and CAS are low and W is high. CKE must be held low to stay in self-refresh mode. In the self-refresh mode, all refreshing signals are generated internally for both banks with all external signals (except CKE) being ignored. Data is retained by the device automatically for an indefinite period when power is maintained, and power consumption is reduced to a minimum. To exit self-refresh mode, CKE must be brought high. New commands may only be issued after tRC has expired. If CLK is made inactive during self refresh, it must be returned to an active and stable condition before CKE is brought high to exit self refresh (see Figure 21). If the burst-refresh scheme is used, 4 096 REFR commands must be executed prior to entering and upon exiting self-refresh. However, if the distributed-refresh scheme utilizing auto refresh is used (for example, two rows every 32 microseconds), the first set of refreshes must be performed upon exiting self-refresh and before continuing with normal device operation. This ensures that the SDRAM is fully refreshed. interrupted bursts A read burst or write burst can be interrupted before the burst sequence has been completed with no adverse effects to the operation. This is accomplished by entering certain superseding commands as listed in Table 7 and Table 8, provided that all timing requirements are met. A DEAC command is considered an interrupt only if it is issued to the same bank as the preceding READ or WRT command. The interruption of READ-P or WRT-P operations is not supported. |
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