PIN DESCRIPTIONS
A0 - A16
Output, address bus, expandable by adding a counter.
Note that VP-1410AF does not have A16.
ANG & ANG
Output, differential analog audio signal.
ANGD
Input, analog signal to be connected to the external
comparator output.
C1
Input, internal RC oscillator. If external clock is to be used,
it must be connected to this pin and its frequency 64x the
sampling rate.
CLK DRV
Output, buffered clock signal, a square wave of the same
frequency as the sampling rate.
D0 - D7
Input, data bus.
ENV
Input, to be connected to an external integrator output.
INT
Output, connected to an external integrator to produce
envelope waveform.
GND
Ground.
I/O1 ~ I/O10
Input/output, trigger pin, active low. I/O1 is for message
#1, I/O2 is for message #2 and etc. When the chip is idle
but not under reset, this pin is the trigger input and pulsing
it will put the chip in the "Play" mode and start the message.
Once in the "Play" mode, the pin becomes a "low" output
until the message is over.
R1
Output, internal oscillator pin. Leave un-connected when
using external clock.
READ
Output, active low. It indicates the chip is in the "Play"
mode. This signal is usually used to enable memory output.
RESET
Input, active high. Reset the chip back to the "Idle" mode.
This pin is level sensitive.
TEST
For factory use only, keep it un-connected.
VCC
Input, supply voltage.
VP-1410A..........................................................................................3
VOICE
Block Diagram
ADDRESS
GENERATOR
OSC. &
TIMING CTRL
A0
:
A16
READ
ANG
TEST
GND
VDD
ENV
INT
CVSD
DEMODULATOR
VDD
GND
RESET
I/O CONTROL
& LATCH
I/O1 .......... I/O10
I/O
SCANNER
12MHz
CLOCK
6-AA FLAG
RECEIVER
ANG
ANGD
CLK
DRV
INPUT BUFFER
& SHIFT REGISTER
D0 ........... D7
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