SN74AUP1G02

LOW POWER SINGLE 2INPUT POSITIVENOR GATE

SCES568B − JUNE 2004 − REVISED JUNE 2005

2

POST OFFICE BOX 655303

description/ordering information (continued)

This single 2-input positive-NOR gate performs the Boolean function Y = A + B or Y = A

• B in positive logic.

NanoStar

 and NanoFree package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING‡

NanoStar

 − WCSP (DSBGA)

0.23-mm Large Bump − YEP

Reel of 3000

SN74AUP1G02YEPR

NanoFree

 − WCSP (DSBGA)

0.23-mm Large Bump − YZP (Pb-free)

Reel of 3000

SN74AUP1G02YZPR

−40

°C to 85°C

SOT (SOT-23) − DBV

Reel of 3000

SN74AUP1G02DBVR

H02_

−40

°C to 85°C

SOT (SOT-23) − DBV

Reel of 250

SN74AUP1G02DBVT

H02_

SOT (SC-70) − DCK

Reel of 3000

SN74AUP1G02DCKR

HB_

SOT (SC-70) − DCK

Reel of 250

SN74AUP1G02DCKT

HB_

SOT (SOT-553) − DRL

Reel of 4000

SN74AUP1G02DRLR

HB_

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

‡ DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition

(1 = SnPb,

FUNCTION TABLE

INPUTS

OUTPUT

A

B

OUTPUT

Y

L

L

H

L

HL

H

LL

H

H

L

logic diagram (positive logic)

A

B

Y

1

2

4