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HD66725 Datasheet(PDF) 9 Page - Hitachi Semiconductor |
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HD66725 Datasheet(HTML) 9 Page - Hitachi Semiconductor |
9 / 95 page HD66740 9 Pin Functions Table 2 Pin Functional Description Signals Number of Pins I/O Connected to Functions IM2, IM1 2 I GND or V CC Selects the MPU interface mode: IM2 "GND" "GND" "Vcc" "Vcc" IM1 "GND" "Vcc" "GND" "Vcc" MPU interface mode Clock synchronized serial interface 68-system parallel interface I2C bus interface 80-system parallel interface IM0/ID 1 I GND or V CC Selects the transfer bus length for a parallel bus interface. GND: 8-bit bus, Vcc: 4-bit bus Inputs the ID of the device ID code for a serial bus and I2C bus interface. CS* 1 I MPU Selects the HD66740: Low: HD66740 is selected and can be accessed High: HD66740 is not selected and cannot be accessed Must be fixed at GND level when not in use. RS 1 I MPU Selects the register for a parallel bus interface. Low: Instruction High: RAM access Must be fixed at GND level when not in use. E/WR*/SCL 1 I MPU For an 80-system parallel bus interface, serves as a write strobe signal and writes data at the low level. For a 68-system parallel bus interface, serves as an enable signal to activate data read/write operation. Inputs the serial transfer clock for a serial interface. Fetches data at the rising edge of a clock. RW/RD*/ SDA 1I or I/O MPU For an 80-system parallel bus interface, serves as a write strobe signal and reads data at the low level. For a 68-system parallel bus interface, serves as a signal to select data read/write operation. Low: Write High: Read Serves as the bidirectional serial transfer data for a serial interface. Sends/Receives data. |
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