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SN75LVDT1422PAG Datasheet(PDF) 10 Page - Texas Instruments |
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SN75LVDT1422PAG Datasheet(HTML) 10 Page - Texas Instruments |
10 / 20 page www.ti.com PARAMETER MEASUREMENT INFORMATION CLK IN / CLK OUT ODD TA/TB ODD RA/RB EVEN TA/TB EVEN RA/RB t 5 pF 100 W TA/TB + TA/TB − tr tf 80 % 20 % 80 % 20 % CMOS/TTL output 8 pF tr tf 80% 20% 80% 20% Differential tt(CLK) 80% 20% 80% 20% 3 V 0 V tt(CLK) CLK IN SN75LVDT1422 SLLS653 – JUNE 2005 Figure 1. Worst Case Test Pattern Figure 2. LVDS Output Load Figure 3. Receiver CMOS/LVTTL Output Load and Transition Times Figure 4. Transmitter LVDS Transition Times Figure 5. Transmitter Input Clock Transition Time 10 |
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