Data Sheet S15678EJ1V0DS

8

µµµµPD161641

3. PIN FUNCTIONS

(1/2)

Symbol

Pin Name

Pad No.

I/O

Function

Driver output

132 to 251,

258 to 377

Output

Scan signal output pins that drive the gate electrode of a TFT-

LCD. The status of each output pin changes in synchronization

with the rising edge of shift clock. The output voltage of the driver

STVR,

STVL

Start pulse input/output

85 to 89,

91 to 95

I/O

Input/output pin of the internal shift register.

Read of start pulse signal is set at rising edge of shift clock, and

outputs a scanning signal from a driver output pin. In addition,

the effective level of a STVR/STVL pin is determined by setup

(logic level).

STVSEL = L: Start pulse is set to low level by the 240th falling

edge of shift clock, and is set to a high level by the 241st falling

edge.

STVSEL

Start pulse input

effective level selection

33 to 37

Input

The effective level of the start pulse signal inputted into

STVR/STVL is selected.

STVSEL = L: Low level

STVSEL = H: High level

CLK

Shift clock input

97 to 101

Input

Shift clock input for the internal shift register. The contents of

internal shift register is shifted at the rising edge of CLK.

Connect to GCLK pin of source driver.

R,/L

Shift direction

switching input

39 to 43

Input

Shift direction switching input pin of the internal shift register.

R,/L = H (right shift): STVR

R,/L = L (left shift): STVL

OE1

Enable input

103 to 107

Input

Input of the level selected by OE1SEL fixes a driver output to a

low level (input of a low level fixes driver output to low level at

the time of OE1SEL = L). However, shift register is not cleared.

Moreover, output enable operation is asynchronous on a clock.

Connect with GOE1 pin of sauce driver.

OE1SEL

OE1 effective level

selection

20 to 24

Input

This pin selects effective level of OE1 pin.

OE1SEL = L: Low level

OE1SEL = H: High level

OE2

Enable input

109 to 113

Input

Input of the level selected by OE2SEL fixes a driver output to a

high level (input of a low level fixes driver output to high level at

the time of OE2SEL = L). However, shift register is not cleared.

Moreover, output enable operation is asynchronous on a clock.

Connect with GOE2 pin of sauce driver.

OE2SEL

OE2 effective level

selection

26 to 30

Input

This pin selects effective level of OE2 pin.

OE2SEL = L: Low level

OE2SEL = H: High level