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TPS51117 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS51117 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 22 page www.ti.com HIGH-SIDE DRIVER SOFTSTART POWERGOOD OUTPUT DISCHARGE CONTROL (SOFTSTOP) OVERCURRENT LIMIT V TRIP (mV) * RTRIP(kq) 10 (mA) (4) Iocp V TRIP R DS(on) * I ripple 2 V TRIP R DS(on) * 1 2 L ƒ V IN [ V OUT V OUT V IN (5) TPS51117 SLVS631 – DECEMBER 2005 DETAILED DESCRIPTION (continued) The high-side driver is designed to drive high-current, low RDS(on) N-channel MOSFET(s). When configured as a floating driver, 5-V bias voltage is delivered from V5DRV supply. An internal PN diode is connected between V5DRV to this pin. The designer can add an external schottky diode if forward drop is critical to drive the high-side NFET or to achieve the last one percent efficiency improvement. The average drive current is also estimated by the gate charge at Vgs = 5 V times the switching frequency. The instantaneous drive current is supplied by the flying capacitor between the VBST pin and LL pin. The drive capability is represented by its internal resistance, which is 5 Ω for VBST to DRVH and 1.5 Ω for DRVH to LL. The TPS51117 has an internal, 1.2-ms, voltage servo softstart with overcurrent limit. When the EN_PSV pin becomes high, an internal DAC begins ramping up the reference voltage to the error amplifier. Smooth control of the output voltage is maintained during start up. The TPS51117 has power-good output. PGOOD is an open drain 7.5-mA pull-down output. This pin should be typically connected to a 5-V power supply node through a 100-k Ω resistor. The power-good function is activated after the soft start has finished. If the output voltage becomes within ±5% of the target value, internal comparators detect the power-good state and the power-good signal becomes high after a 64- µs internal delay. If the output voltage goes outside ±10% of the target value, the power-good signal becomes low immediately. The TPS51117 discharges output when EN_PSV is low or the converter is in a fault condition (UVP, OVP, UVLO, or thermal shutdown). The TPS51117 discharges output using an internal 20- Ω MOSFET which is connected to VOUT and PGND. The discharge time-constant is a function of the output capacitance and resistance of the discharge transistor. The TPS51117 has cycle-by-cycle overcurrent limiting control. Inductor current is monitored during the OFF state and the controller keeps the OFF state when inductor current is larger than the overcurrent trip level. In order to provide both good accuracy and a cost effective solution, the TPS51117 supports temperature compensated MOSFET RDS(on) sensing. The TRIP pin should be connected to GND through the trip voltage setting resistor, RTRIP. The TRIP terminal sources 10-µA ITRIP current, and the trip level is set to the OCL trip voltage, VTRIP as in the following equation. Inductor current is monitored by the voltage between the PGND pin and the LL pin so the LL pin should be connected to the drain terminal of the low-side MOSFET. ITRIP has 4500 ppm/°C temperature coefficient to compensate the temperature dependency of the RDS(on). PGND is used as the positive current sensing node so PGND should be connected to the source terminal of the bottom MOSFET. As the comparison is done during the OFF state, VTRIP sets the valley level of the inductor current. Thus, the load current at overcurrent threshold, Iocp, can be calculated as follows; In an overcurrent condition, the current to the load exceeds the current to the output capacitor thus the output voltage tends to fall. Eventually it crosses the undervoltage protection threshold and shutdown. 9 |
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