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XRT83SL30 Datasheet(PDF) 4 Page - Exar Corporation |
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XRT83SL30 Datasheet(HTML) 4 Page - Exar Corporation |
4 / 76 page XRT83SL30 áç áç áç áç SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. P1.0.4 PRELIMINARY I TABLE OF CONTENTS GENERAL DESCRIPTION ................................................................................................. 1 APPLICATIONS .............................................................................................................................................. 1 FEATURES .................................................................................................................................................... 1 Figure 1. Block Diagram of the XRT83SL30 T1/E1/J1 LIU (Host Mode) ............................................... 1 Figure 2. Block Diagram of the XRT83SL30 T1/E1/J1 LIU (Hardware Mode) ...................................... 2 FEATURES .................................................................................................................................................... 2 ORDERING INFORMATION ............................................................................................................... 3 Figure 3. Pin Out of the XRT83SL30 ....................................................................................................... 3 TABLE OF CONTENTS ....................................................................................................... I PIN DESCRIPTIONS BY FUNCTION ................................................................................. 4 SERIAL INTERFACE ....................................................................................................................................... 4 RECEIVER .................................................................................................................................................... 5 TRANSMITTER ............................................................................................................................................... 6 JITTER ATTENUATOR .................................................................................................................................... 8 CLOCK SYNTHESIZER .................................................................................................................................... 9 REDUNDANCY SUPPORT .............................................................................................................................. 11 TERMINATIONS ........................................................................................................................................... 11 CONTROL FUNCTION ................................................................................................................................... 13 ALARM FUNCTION/OTHER ........................................................................................................................... 14 POWER AND GROUND ................................................................................................................................. 16 FUNCTIONAL DESCRIPTION ......................................................................................... 17 MASTER CLOCK GENERATOR ...................................................................................................................... 17 Figure 4. Two Input Clock Source ......................................................................................................... 17 Figure 5. One Input Clock Source ......................................................................................................... 17 RECEIVER ........................................................................................................................ 18 RECEIVER INPUT ......................................................................................................................................... 18 TABLE 1: MASTER CLOCK GENERATOR ...................................................................................................... 18 RECEIVE MONITOR MODE ........................................................................................................................... 19 RECEIVER LOSS OF SIGNAL (RLOS) ........................................................................................................... 19 Figure 6. Simplified Diagram of -15dB T1/E1 Short Haul Mode and RLOS Condition ..................... 19 RECEIVE HDB3/B8ZS DECODER ................................................................................................................ 20 RECOVERED CLOCK (RCLK) SAMPLING EDGE ............................................................................................ 20 JITTER ATTENUATOR .................................................................................................................................. 20 Figure 7. Simplified Diagram of -29dB T1/E1 Gain Mode and RLOS Condition ............................... 20 Figure 8. Receive Clock and Output Data Timing ............................................................................... 20 GAPPED CLOCK (JA MUST BE ENABLED IN THE TRANSMIT PATH) ................................................................. 21 TABLE 2: MAXIMUM GAP WIDTH FOR MULTIPLEXER/MAPPER APPLICATIONS ............................................... 21 ARBITRARY PULSE GENERATOR .................................................................................................................. 22 TRANSMITTER ................................................................................................................. 22 DIGITAL DATA FORMAT ............................................................................................................................... 22 TRANSMIT CLOCK (TCLK) SAMPLING EDGE ................................................................................................ 22 Figure 9. Arbitrary Pulse Segment Assignment .................................................................................. 22 TRANSMIT HDB3/B8ZS ENCODER .............................................................................................................. 23 Figure 10. Transmit Clock and Input Data Timing ............................................................................... 23 TABLE 3: EXAMPLES OF HDB3 ENCODING ................................................................................................. 23 TABLE 4: EXAMPLES OF B8ZS ENCODING .................................................................................................. 23 DRIVER FAILURE MONITOR (DMO) .............................................................................................................. 24 TRANSMIT PULSE SHAPER & LINE BUILD OUT (LBO) CIRCUIT ...................................................................... 24 TABLE 5: RECEIVE EQUALIZER CONTROL AND TRANSMIT LINE BUILD-OUT SETTINGS .................................. 24 TRANSMIT AND RECEIVE TERMINATIONS .................................................................. 26 RECEIVER ............................................................................................................................................... 26 |
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