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P650-07SC Datasheet(PDF) 2 Page - PhaseLink Corporation

Part # P650-07SC
Description  LOW COST Network LAN Clock SOURCE
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Manufacturer  PLL [PhaseLink Corporation]
Direct Link  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

P650-07SC Datasheet(HTML) 2 Page - PhaseLink Corporation

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PLL650-07
LOW COST Network LAN Clock SOURCE
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2
PIN DESCRIPTIONS
Name
Number
Type
Description
XOUT
1
O
Crystal output.
XIN
14
I
25MHz fundamental crystal input (20pF CL parallel resonant) or clock input.
50MHz
4,6
O
50MHz outputs.
25MHz
8,10
O
25MHz outputs.
NC
12
-
No connection.
VDD
3,7
P
Power supply.
GND
5,9,11
P
Ground.
VDDA
13
P
Analog power supply
GNDA
2
P
Analog ground.
Electrical Specifications
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
4.6
V
Input Voltage, dc
VI
-0.5
VDD+0.5
V
Output Voltage, dc
VO
-0.5
VDD+0.5
V
Storage Temperature
TS
-65
150
°C
Ambient Operating Temperature*
TA
-40
85
°C
Junction Temperature
TJ
125
°C
Lead Temperature (soldering, 10s)
260
°C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above
the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. AC Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Input Frequency
10
25
27
MHz
Output Rise Time
0.8V to 2.0V with no load
1.5
ns
Output Fall Time
2.0V to 0.8V with no load
1.5
ns
Duty Cycle
@ 50% VDD
45
50
55
%
Max. Absolute Jitter
Short term
±150
ps
Max. Jitter, cycle to cycle
80
ps


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