AS5C4009CW-85L datasheet(7/12 Pages) ETC1

Part #	AS5C4009CW-85L

Description	SRAM

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AS5C4009LL

Austin Semiconductor, Inc.

AS5C4009LL

Rev. 4.0 2/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

7

WRITE CYCLE NO. 1

(WE Controlled)

WRITE CYCLE NO. 2

(Write Enabled Controlled)

NOTES:

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.

2. At any given temperature adn voltage condition, tHZ (MAX) is less than tLZ (MIN) both for a given device and from device to

device interconnection.

3. A write occurs during the overlap of a low CE\ adn a low WE\. A write begins at the latest transistion among CE\ going Low and

WE\ going Low: A write end at the earliest transistion among CE\ going High and WE\ going High, tWP is measured from the

beginning of write to the end of write.

4. tCW is measured from the CE\ going Low to end of write.

5. tAS is measured from the address valid to the beginning of write.

6. tWR is measure from the end of write to the address change. tWR applied in case a write ends are CE\ or WE\ going High.

ADDRESS

t

WC

t

CW(4)

CE\

123456789

123456789012345678901

1234567890123456789012

123456

1234567890123456

12345678901234567

t

AW

Data Valid

t

WR(6)

t

AS(5)

DATA OUT

1234567

Data Undefined

t

WP(3)

t

DW

t

DH

t

WHZ

t

OW

WE\

DATA IN

123456789

1234567890123456789012345

12345678901234567890123456

1234567

123456789012345678

ADDRESS

t

WC

t

CW(4)

CE\

t

AW

Data Valid

t

WR(6)

t

AS(5)

DATA OUT

t

WP(3)

t

DW

t

DH

WE\

DATA IN

High-Z

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