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AN5392FBQ Datasheet(PDF) 2 Page - Panasonic Semiconductor |
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AN5392FBQ Datasheet(HTML) 2 Page - Panasonic Semiconductor |
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2 / 23 page  AN5392FBQ ICs for TV 2 s Block Diagram 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 BLK in R,G,B mute Neck mute CRT mute DI in Pulse VCC Analog GND R-GND R-out R-VCC B-GND B-out B-VCC G-GND G-out G-VCC Y, U, V GND B −Y (M2) in Y (M2) in R −Y (M2) in CLP (M2) in B −Y (M1) in Y (M1) in R −Y (M1) in CLP (M1) in M/S in Y, U, V VCC B −Y (S) in Y (S) in R −Y (S) in ABL/ACL in VM out 64 63 62 61 60 59 58 57 56 Input block 55 54 53 52 51 50 49 BLK block Output block Video block Chrominance block R, G, B → Y, U, V block I2C DAC block SW block Matrix block ABL/ACL block Y Y G B R G −Y B −Y R −Y B −Y R −Y G B R |
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