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P520-89OC Datasheet(PDF) 3 Page - PhaseLink Corporation

Part # P520-89OC
Description  Low Phase Noise VCXO (9.5-65MHz)
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Manufacturer  PLL [PhaseLink Corporation]
Direct Link  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

P520-89OC Datasheet(HTML) 3 Page - PhaseLink Corporation

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Preliminary
PLL520-88/-89
Low Phase Noise VCXO (9.5-65MHz)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 3
2. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
FXIN
Fundamental
19
65
MHz
Crystal Loading Rating
CL (xtal)
Die
8*
pF
Interelectrode Capacitance
C0
5
pF
Recommended ESR
RE
AT cut
30
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific
limits.
3. Voltage Control Crystal Oscillator (3.3V)
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
VCXO Stabilization Time *
TVCXOSTB
From power valid
10
ms
VCXO Tuning Range
FXIN = 19 – 65MHz;
XTAL C0/C1 < 250
0V
≤ VCON ≤ 3.3V
200*
ppm
CLK output pullability
VCON=1.65V,
±1.65V
±100*
ppm
On-chip Varicaps control range
VCON = 0 to 3.3V
4 – 18*
pF
Linearity
10*
%
VCXO Tuning Characteristic
65
ppm/V
VCON input impedance
60
k
VCON modulation BW
0V
≤ VCON ≤ 3.3V, -3dB
25
kHz
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific
limits.
4. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Supply Current (Loaded
Outputs)
IDD
PECL/LVDS
100/80
mA
Operating Voltage
VDD
2.97
3.63
V
Output Clock Duty Cycle
@ 50% VDD (CMOS)
@ 1.25V (LVDS)
@ VDD – 1.3V (PECL)
45
45
45
50
50
50
55
55
55
%
Short Circuit Current
±50
mA


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