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PLL502-27XSM Datasheet(PDF) 3 Page - PhaseLink Corporation |
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PLL502-27XSM Datasheet(HTML) 3 Page - PhaseLink Corporation |
3 / 5 page Preliminary PLL502-27 Low Phase Noise VCXO (24MHz to 50MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 2/25/03 Page 3 2. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Input Crystal Frequency 12 25 MHz 0.8V ~ 2.0V with 10 pF load 1.15 Output Clock Rise/Fall Time (Low Drive) 0.3V ~ 3.0V with 15 pF load 3.7 0.8V ~ 2.0V with 10 pF load 0.5 Output Clock Rise/Fall Time (High Drive) 0.3V ~ 3.0V with 15 pF load 1.5 ns Output Clock Duty Cycle Measured @ 1.4V 45 50 55 % Short Circuit Current ±50 mA 3. Voltage Control Crystal Oscillator PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VCXO Stabilization Time * TVCXOSTB From power valid 10 ms VCXO Tuning Range FXIN = 12 – 25MHz; XTAL C0/C1 < 250 500 ppm CLK output pullability 0V ≤ VIN ≤ 3.3V ±250 ppm VCXO Tuning Characteristic 165 ppm/V Pull range linearity 10 % VCON pin input impedance 2000 k Ω VCON modulation BW 0V ≤ VIN ≤ 3.3V, -3dB 25 kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits. 4. Jitter and Phase Noise specification PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS RMS Period Jitter (1 sigma – 1000 samples) at 44MHz, with capacitive decoupling between VDD and GND. 10 ps Phase Noise relative to carrier 44MHz @100Hz offset -80 dBc/Hz Phase Noise relative to carrier 44MHz @1kHz offset -110 dBc/Hz Phase Noise relative to carrier 44MHz @10kHz offset -130 dBc/Hz Phase Noise relative to carrier 44MHz @100kHz offset -123 dBc/Hz Phase Noise relative to carrier 44MHz @1MHz offset -124 dBc/Hz |
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