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MAX8761 Datasheet(PDF) 3 Page - Maxim Integrated Products

Part # MAX8761
Description  Low-Cost, Linear-Regulator LCD Panel Power Supplies
Download  25 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX8761 Datasheet(HTML) 3 Page - Maxim Integrated Products

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Low-Cost, Linear-Regulator
LCD Panel Power Supplies
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VIN = VINL = VSUPCP = 12V, VOUTL = VSUPB = 10V, VSRC = 27V, TA = 0°C to +85°C. Typical values are at TA =
+25°C, unless otherwise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OPERATIONAL AMPLIFIER (MAX8710/MAX8711/MAX8761)
SUPB Supply Operating Range
4.5
13.2
V
SUPB Supply Current
Buffer configuration, VPOSB = 4V, no load
0.7
1.0
mA
Input Offset Voltage
(VNEGB, VPOSB) = VSUPB / 2, TA = +25
°C0
12
mV
Input Bias Current
(VNEGB, VPOSB) = VSUPB / 2
-50
+1
+50
nA
Common-Mode Input Range
VNEGB, VPOSB
0VSUPB
V
Common-Mode Rejection Ratio
0
≤ (VNEGB, VPOSB) < VSUPB
50
90
dB
Open-Loop Gain
125
dB
IOUTB = 100µA
VSUPB -
15
VSUPB -
2
Output Voltage Swing High
IOUTB = 5mA
VSUPB -
150
VSUPB -
80
mV
IOUTB = -100µA
2
15
Output Voltage Swing Low
IOUTB = -5mA
80
150
mV
Short to VSUPB / 2, sourcing
50
150
Short-Circuit Current
Short to VSUPB / 2, sinking
50
140
mA
Output Current
Buffer configuration, VPOSB = 4V,
VOUTB error <
±10mV
±40
mA
Power-Supply Rejection Ratio
6V
≤ VSUPB ≤ 13.2V, DC (VNEGB, VPOSB) = VSUPB / 2
60
100
dB
Slew Rate
12
V/µs
-3dB Bandwidth
Buffer configuration, RL = 10k
Ω, CL = 10pF
12
MHz
Gain-Bandwidth Product
Buffer configuration, RL = 10k
Ω, CL = 10pF
8
MHz
POSITIVE CHARGE-PUMP REGULATOR
FBP Regulation Voltage
IGON = 10mA
2.425
2.500
2.575
V
FBP Line-Regulation Error
VOUTL (VSUPCP, MAX8710/MAX8761)
= 10.8V~13.2V, VGON = 27V, IGON = 20mA
25
mV
FBP Input Bias Current
VFBP = 2.5V
-50
+50
nA
DRVP p-Channel On-Resistance
15
30
VFBP = 2.4V
6
12
DRVP n-Channel On-Resistance
VFBP = 2.6V
20
k
FBP Fault Trip Level
Falling edge
1.92
2.00
2.08
V
Positive Charge-Pump Soft-Start
Period
2
12 oscillator clock cycles in a 7-bit DAC
2.73
ms
NEGATIVE CHARGE-PUMP REGULATOR
FBN Regulation Voltage
IGOFF = 10mA
200
250
300
mV
FBN Input Bias Current
VFBN = 250mV
-50
+50
nA
FBN Line Regulation
VOUTL (VSUPCP, MAX8710/MAX8761)
= 10.8V~13.2V, VVGOFF = -6V, IGOFF = -50mA
25
mV
DRVN p-Channel On-Resistance
7.5
15


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