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ICS8432DY-101T Datasheet(PDF) 7 Page - Integrated Circuit Systems |
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ICS8432DY-101T Datasheet(HTML) 7 Page - Integrated Circuit Systems |
7 / 18 page 8432DY-101 www.icst.com/products/hiperclocks.html REV. B JUNE 1, 2005 7 Integrated Circuit Systems, Inc. ICS8432-101 700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER PARAMETER MEASUREMENT INFORMATION 3.3V OUTPUT LOAD AC TEST CIRCUIT DIFFERENTIAL INPUT LEVEL CYCLE-TO-CYCLE JITTER PERIOD JITTER OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD OUTPUT SKEW OUTPUT RISE/FALL TIME V CMR Cross Points V PP V EE nCLK V CC CLK SCOPE Qx nQx LVPECL 2V -1.3V ± 0.165V VOH VREF VOL Mean Period (First edge after trigger) Reference Point (Trigger Edge) 1 σ contains 68.26% of all measurements 2 σ contains 95.4% of all measurements 3 σ contains 99.73% of all measurements 4 σ contains 99.99366% of all measurements 6 σ contains (100-1.973x10-7)% of all measurements Histogram tsk(o) nFOUTx FOUTx nFOUTy FOUTy Clock Outputs 20% 80% 80% 20% tR t F VSWING t PW t PERIOD t PW t PERIOD odc = x 100% FOUTx nFOUTx ➤ ➤ nFOUTx FOUTx tjit(cc) = tcycle n –tcycle n+1 1000 Cycles tcycle n tcycle n+1 V CC, V CCO V EE |
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