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650GI41L Datasheet(PDF) 3 Page - Integrated Circuit Systems |
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650GI41L Datasheet(HTML) 3 Page - Integrated Circuit Systems |
3 / 11 page Spread Spectrum Clock Synthesizer MDS 650-41 F 3 Revision 082305 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com ICS650-41 Pin Descriptions External Components Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS650-41 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between each VDD and the PCB ground plane. Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50 Ω trace (a commonly used trace impedance), place a 33 Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20 Ω. Crystal Load Capacitors The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL -6 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 20 pF [(16-6) x 2] = 20. Pin Number Pin Name Pin Type Pin Description 1 X1/CLKIN Input Crystal input. Connect this pin to a 25 MHz crystal or external input clock. 2 FS0 Input Select pin 0. Internal pull-up resistor. See table on page 2. 3 FS1 Input Select pin 1. Internal pull-up resistor. See table on page 2. 4 SS_EN Input Spread spectrum enable pin. Internal pull-up resistor. Enabled = high. 5 VDD Power Connect to +3.3 V. 6 GND Power Connect to ground. 7 FS3 Input Select pin 3. Internal pull-up resistor. See table on page 2. 8 48M Output Fixed 48 MHz output. Weak internal pull-down when tri-state. 9 50M Output Spread Spectrum output. Weak internal pull-down when tri-stated. 10 VDDO Power Connect to +2.5 V. 11 GND Power Connect to ground. 12 VDD Power Connect to +3.3 V. 13 FS2 Input Select pin 2. Internal pull-up resistor. See table on page 2. 14 PDTS Input Powers down entire chip. Tri-states CLK outputs when low. Internal pull-up. 15 VDD Power Connect to +3.3 V. 16 X2 Output Crystal Output. Connect this pin to a 25 MHz crystal. Do not connect if clock input is used. |
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