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ICS8432DYI-101 Datasheet(PDF) 11 Page - Integrated Circuit Systems |
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ICS8432DYI-101 Datasheet(HTML) 11 Page - Integrated Circuit Systems |
11 / 18 page 8432DYI-101 www.icst.com/products/hiperclocks.html REV. A MAY 23, 2005 11 Integrated Circuit Systems, Inc. ICS8432I-101 700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER LAYOUT GUIDELINE The schematic of the ICS8432I-101 layout example used in this layout guideline is shown in Figure 6A. The ICS8432I-101 recommended PCB board layout for this example is shown in Figure 6B. This layout example is used as a general guideline. FIGURE 6A. SCHEMATIC OF RECOMMENDED LAYOUT C16 10u Termination A U1 8432-101 1 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 M5 M6 M7 M8 N0 N1 nc VEE MR S_CLOCK S_DATA S_LOAD VDDA nCLK_SEL REF_IN CLK R1 125 VCCA TL2 Zo = 50 Ohm IN- IN- S_CLOCK VCC R3 125 C11 0.01u XTAL_SEL R3 50 S_LOAD R7 10 TL1 Zo = 50 Ohm MR IN+ R4 84 R2 84 S_DATA R1 50 C15 0.1u nCLK CLK IN+ Termination B (not shown in the layout) R2 50 C14 0.1u VCC The layout in the actual system will depend on the selected com- ponent types, the density of the components, the density of the traces, and the stack up of the P.C. board. |
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