Detailed Description

The MAX4832/MAX4833 are ultra-low quiescent current,

low-dropout linear regulators with an integrated current

limiter. These devices guarantee up to 100mA drive

capabilities and regulate the preset output voltage.

The MAX4832 has a flag output that asserts low when

the load current exceeds the current limit for more than

output that asserts low when the regulator output volt-

shows the simplified functional diagram and Figure 2

shows the typical application circuits.

FLAG Output (MAX4832)

The open-drain FLAG output goes low and the LDO’s

pass transistor is latched off when the current in the

pass transistor is at its output current limit for more than

to low to high) brings the device out of its latched-off

state and back into normal operation.

RESET Output (MAX4833)

The RESET output asserts when one of the following

conditions occurs:

•

•

•

SHDN is pulled low.

•

The device is in thermal shutdown.

•

after reset conditions are terminated. There are four

RESET timeout periods available as shown in the

Electrical Characteristics table. RESET is available in a

push-pull configuration as shown in the Selector Guide.

Shutdown

Pull SHDN low to shut down the LDO and reduce the

quiescent current consumption of the device from 90µA

to 0.1µA. In shutdown mode, the pass transistor, con-

trol circuit, and reference circuit are turned off. Connect

the LDO.

100mA LDO Linear Regulators with

Current-Limiting Switch

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7

Pin Description

PIN

SOT23

TDFN

NAME

FUNCTION

11

IN

Regulator Power Input. Bypass IN to GND with a 0.1µF ceramic capacitor. Install the bypass

capacitor as close to the device as possible.

2

2

GND

Ground

33

SHDN

Active-Low Shutdown Input. Drive SHDN low to shutdown the regulator. Drive SHDN high or

connect to IN for normal operation.

FLAG

(MAX4832)

Overcurrent Flag. Open-drain FLAG goes low when the device senses sustained current

exceeding the current-limit threshold for a duration longer than the blanking time. FLAG is high

when SHDN is low or the device is in thermal shutdown.

44

RESET

(MAX4833)

Active-Low Reset Output. Push-pull RESET goes low when the voltage at OUT is below the reset

threshold or when the voltage at OUT is greater than IN. RESET is low when SHDN is low or the

device is in thermal shutdown. After the reset condition terminates, RESET remains low for the

duration of the reset timeout period.

55

SS

startup. No capacitor from SS to GND gives 1ms output rise time at startup. See the soft-start

response time plots in the Typical Operating Characteristics.

6

6

OUT

Regulator Output. Bypass OUT to GND with a 3.3µF or larger ceramic capacitor. The capacitor’s

ESR should be less than 0.2

Ω for stable operation.

—EP

EP

Exposed Pad. EP is internally connected to GND. Externally connect EP to GND to provide a low

thermal resistance path from the IC junction to the PC board.