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ICS840001CK-32LF Datasheet(PDF) 7 Page - Integrated Circuit Systems |
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ICS840001CK-32LF Datasheet(HTML) 7 Page - Integrated Circuit Systems |
7 / 10 page 840001CK-32 www.icst.com/products/hiperclocks.html REV. A NOVEMBER 23, 2005 7 Integrated Circuit Systems, Inc. ICS840001-32 FEMTOCLOCKS™ CRYSTAL-TO- LVCMOS/LVTTL FREQUENCY SYNTHESIZER PRELIMINARY APPLICATION INFORMATION Figure 2. CRYSTAL INPUt INTERFACE CRYSTAL INPUT INTERFACE The ICS840001-32 has been characterized with 10pF paral- lel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 40MHz, 10pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840001-32 provides sepa- rate power supplies to isolate any high switching noise from the outputs to the internal PLL. V DD, VDDA and VDDO_X should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 Ω resistor along with a 10 μF and a .01μF bypass capacitor should be connected to each V DDA pin. The 10 Ω resistor can also be replaced by a ferrite bead. POWER SUPPLY FILTERING TECHNIQUES FIGURE 1. POWER SUPPLY FILTERING 10 Ω V DDA 10 μF .01 μF 3.3V .01 μF V DD C1 X1 Crystal C2 XTAL_IN XTAL_OUT |
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