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ICS650GI-47LFT Datasheet(PDF) 8 Page - Integrated Circuit Systems |
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ICS650GI-47LFT Datasheet(HTML) 8 Page - Integrated Circuit Systems |
8 / 10 page Spread Spectrum Clock Synthesizer MDS 650-47 B 8 Revision 082305 Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com PRELIM INAR Y INFORM A T ION ICS650-47 Timing Diagrams Figure 1: Test and Measurement Setup Figure 3: Rise and Fall Time Definitions Figure 5: PDTS to Stable Clock Output Timing Figure 2: Duty Cycle Definitions Figure 4: Power Up and PLL Lock Timing Figure 6: Short Term Jitter Definition DUT 0.01µF C LOAD VDDs GND Outputs VDDO t 3 Clock Output t 4 0V 80% of VDDO 20% of VDDO 1.25 V PD TS CLK Outputs VO H t EN 0 V t DIS 1% 1.25 V VD D O t 2 Clo c k t 1 0V 50% o f V D D O 4 ms 10 ms VDD 0V VDD 0V 0 ms Power Up Tim e VCO Ram p Time PLL Locked Jitter (p - p) Mean value tJA |
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