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ICS843204I Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS843204I Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 12 page 843204AGI www.icst.com/products/hiperclocks.html REV. A JANUARY 6, 2006 1 Integrated Circuit Systems, Inc. ICS843204I FEMTOCLOCKS™ CRYSTAL-TO- 3.3V LVPECL FREQUENCY SYNTHESIZER PRELIMINARY PLL OSC ÷4 OSC 25MHz 19.44MHz PLL ÷4 622.08MHz 155.52MHz 625MHz 156.25MHz 0 1 0 1 0 1 0 1 GENERAL DESCRIPTION The ICS843204I is a 4 output LVPECL Synthesizer optimized to generate Gigabit Ethernet and SONET reference clock fre- quencies and is a member of the HiPerClocksTM family of high performance clock solutions from ICS. Using a 19.44MHz and 25MHz, 18pF parallel resonant crystal, 155.52MHz and 156.25MHz frequencies can be generated. The ICS843204I uses ICS’ FemtoClockTM low phase noise VCO technology and can achieve 1ps or lower typical RMS phase jitter. The ICS843204I is packaged in a 48-pin TSSOP package. FEATURES • Four 3.3V LVPECL outputs • Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input • Supports the following output frequencies: 155.52MHz and 156.25MHz • VCO range: 560MHz - 680MHz • RMS phase jitter @ 155.52MHz, using a 19.44MHz cryst al (12kHz - 13MHz): 0.86ps (typical) • RMS phase jitter @ 156.25MHz, using a 19.44MHz cryst al (1.875MHz - 20MHz): 0.52ps (typical) • Full 3.3V supply mode • -40°C to 85°C ambient operating temperature • Available in both standard and lead-free RoHS compliant packages HiPerClockS™ ICS PIN ASSIGNMENT ICS843204I 48 Lead TSSOP 6.1mm x 12.5mm x 0.93mm package body G Package Top View nQA1 QA1 nQA0 QA0 nc VCCO_A SELA1 SELA0 PLL_BYPASS_A nc nc nc nc XTAL_IN1 XTAL_OUT1 CLK1 IN_SEL_B PLL_BYPASS_B VCCO_B nc QB0 nQB0 QB1 nQB1 IN_SEL_A CLK0 XTAL_IN0 XTAL_OUT0 nc VEE OEA0 OEA1 VCC VCCA nc nc SELB0 VEE OEB0 OEB1 VCC SELB1 VCCA nc nc nc nc nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 QA0 nQA0 QA1 nQA1 QB0 nQB0 QB1 nQB1 PLL_BYPASS_A IN_SELA CLK0 XTAL_IN0 XTAL_OUT0 PLL_BYPASS_B IN_SELB CLK1 XTAL_IN1 XTAL_OUT1 SELA1 OEA1 SELA0 OEA0 SELB1 OEB1 SELB0 OEB0 BLOCK DIAGRAM The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. |
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