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ICS843246 Datasheet(PDF) 11 Page - Integrated Circuit Systems |
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ICS843246 Datasheet(HTML) 11 Page - Integrated Circuit Systems |
11 / 15 page 843246AM www.icst.com/products/hiperclocks.html REV. A SEPTEMBER 29, 2005 11 Integrated Circuit Systems, Inc. ICS843246 FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS843246. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS843246 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for V CC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. • Power (core) MAX = VCC_MAX * IEE_MAX = 3.465V * 107mA = 370.75mW • Power (outputs) MAX = 30.2mW/Loaded Output pair If all outputs are loaded, the total power is 6 * 30mW = 180mW Total Power _MAX (3.465V, with all outputs switching) = 370.75mW + 180mW = 550.75mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. The equation for Tj is as follows: Tj = θ JA * Pd_total + TA Tj = Junction Temperature θ JA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) T A = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ JA must be used. Assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 43°C/W per Table 7 below. Therefore, Tj for an ambient temperature of 70°C with all outputs switching is: 70°C + 0.551W * 43°C/W = 93.7°C. This is well below the limit of 125°C. This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer). θθθθθ JA by Velocity (Linear Feet per Minute) TABLE 7. THERMAL RESISTANCE θθθθθ JA FOR 24-PIN SOIC, FORCED CONVECTION 0 200 500 Multi-Layer PCB, JEDEC Standard Test Boards 50°C/W 43°C/W 38°C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. |
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