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ICS843256AGLFT Datasheet(PDF) 9 Page - Integrated Circuit Systems |
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ICS843256AGLFT Datasheet(HTML) 9 Page - Integrated Circuit Systems |
9 / 13 page 843256AM www.icst.com/products/hiperclocks.html REV. A NOVEMBER 29, 2005 9 Integrated Circuit Systems, Inc. ICS843256 FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY TERMINATION FOR 3.3V LVPECL OUTPUT V CC - 2V 50 Ω 50 Ω RTT Z o = 50Ω Z o = 50Ω FOUT FIN RTT = Z o 1 ((V OH + VOL) / (VCC – 2)) – 2 3.3V 125 Ω 125 Ω 84 Ω 84 Ω Z o = 50Ω Z o = 50Ω FOUT FIN The clock layout topology shown below is a typical termi- nation for LVPECL outputs. The two different layouts men- tioned are recommended only as guidelines. FOUT and nFOUT are low impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, termi- nating resistors (DC current path to ground) or current sources must be used for functionality. These outputs are FIGURE 3B. LVPECL OUTPUT TERMINATION FIGURE 3A. LVPECL OUTPUT TERMINATION designed to drive 50 Ω transmission lines. Matched imped- ance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 3A and 3B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. INPUTS: LVCMOS CONTROL PINS: All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS OUTPUTS: LVPECL OUTPUT All unused LVPECL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. |
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