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ICS844004AGI-04T Datasheet(PDF) 10 Page - Integrated Circuit Systems |
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ICS844004AGI-04T Datasheet(HTML) 10 Page - Integrated Circuit Systems |
10 / 13 page 844004AGI-04 www.icst.com/products/hiperclocks.html REV. A JANUARY 26, 2006 10 Integrated Circuit Systems, Inc. ICS844004I-04 FEMTOCLOCKS™CRYSTAL/LVCMOS-TO- LVDS FREQUENCY SYNTHESIZER PRELIMINARY POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS844004I-04. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS844004I-04 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for V DD = 3.3V + 5% = 3.465V, which gives worst case results. • Power (core) MAX = VDD_MAX * (IDD_MAX + IDDA_MAX) = 3.465V * (80mA + 8mA) = 304.92mW • Power (outputs) MAX = VDDO_MAX * IDDO_MAX = 3.465V * 87mA = 301.45mW Total Power _MAX = 304.92mW + 301.45mW = 606.37mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. The equation for Tj is as follows: Tj = θ JA * Pd_total + TA Tj = Junction Temperature q JA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) T A = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ JA must be used. Assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 65°C/W per Table 7 below. Therefore, Tj for an ambient temperature of 85°C with all outputs switching is: 85°C + 0.606W * 65°C/W = 124°C. This is below the limit of 125°C. This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer). TABLE 7. THERMAL RESISTANCE θθθθθ JA FOR 24-LEAD TSSOP, FORCED CONVECTION θθθθθ JA by Velocity (Meters per Second) 0 1 2.5 Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W 65°C/W 62°C/W |
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