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ICS180M-52LF Datasheet(PDF) 2 Page - Integrated Circuit Systems |
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ICS180M-52LF Datasheet(HTML) 2 Page - Integrated Circuit Systems |
2 / 6 page LOW EMI CLOCK GENERATOR ICS180-52 MDS 180-52 A 2 Revision 110404 Integrated Circ uit Systems l 52 5 Race Stre et, San Jose, CA 95 126 l te l (4 08) 297 -1 201 l www.icst.com Pin Assignment Spread Spectrum Select Table 0 = connect to GND 1 = connect directly to VDD Note: SS% pin has an internal pull-up resistor Frequency Range Selection Table Pin Descriptions 1 2 3 X1/CLKIN 4 X2 GND FS1 SS% VDD CLKOUT 8 7 6 5 SSON# 8-pin (150 mil) SOIC SS% (Pin 4) Spread Direction Spread Percentage (%) 0 Center +/-0.625% 1 Center +/1.875% FS1 (Pin 7) Frequency Range Selection (MHz) 08-10 1 10-15 Pin Number Pin Name Pin Type Pin Description 1 X1/CLKIN Input Crystal or Clock Input. 2 X2 Output Crystal output. Float for a clock input. 3 GND Power Connect to ground. 4 SS% Input Select pin for spread amount. See table above. Internal pull-up resistor. 5 CLKOUT Output Spread spectrum clock output per table above. 6 VDD Power Connect to 3.3 V or 5 V. 7 FS1 Input Select pin for input frequency. See table above. Internal pull-up resistor. 8 SSON# Input Spread Spectrum Control. This pin enables spread spectrum when low. Internal pull-down resistor. |
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