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ICS853011CMLFT Datasheet(PDF) 9 Page - Integrated Circuit Systems |
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ICS853011CMLFT Datasheet(HTML) 9 Page - Integrated Circuit Systems |
9 / 14 page 853011CM www.icst.com/products/hiperclocks.html REV. A MARCH 19, 2004 9 Integrated Circuit Systems, Inc. ICS853011C LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER PRELIMINARY POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS853011C. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS853011C is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for V CC = 3.8V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. • Power (core) MAX = VCC_MAX * IEE_MAX = 3.8V * 18mA = 68.4mW • Power (outputs) MAX = 30.94mW/Loaded Output pair If all outputs are loaded, the total power is 2 * 30.94mW = 61.88mW Total Power _MAX (3.8V, with all outputs switching) = 68.4mW + 61.88mW = 130.3mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. The equation for Tj is as follows: Tj = θ JA * Pd_total + TA Tj = Junction Temperature θ JA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) T A = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ JA must be used. Assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 5A below. Therefore, Tj for an ambient temperature of 85°C with all outputs switching is: 85°C + 0.130W * 103.3°C/W = 98.4°C. This is well below the limit of 125°C. This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and the type of board (single layer or multi-layer). θθθθθ JA by Velocity (Linear Feet per Minute) 0 200 500 Single-Layer PCB, JEDEC Standard Test Boards 153.3°C/W 128.5°C/W 115.5°C/W Multi-Layer PCB, JEDEC Standard Test Boards 112.7°C/W 103.3°C/W 97.1°C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TABLE 5A. THERMAL RESISTANCE θθθθθ JA FOR 8-PIN SOIC, FORCED CONVECTION TABLE 5B. THERMAL RESISTANCE θθθθθ JA FOR 8-PIN TSSOP, FORCED CONVECTION θθθθθ JA by Velocity (Meters per Second) 01 2 Multi-Layer PCB, JEDEC Standard Test Boards 101.7°C/W 90.5°C/W 89.8°C/W |
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