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PE3240EK Datasheet(PDF) 7 Page - Peregrine Semiconductor Corp. |
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PE3240EK Datasheet(HTML) 7 Page - Peregrine Semiconductor Corp. |
7 / 12 page Product Specification PE3240 Page 7 of 12 Document No. 70-0034-02 │ www.psemi.com ©2006 Peregrine Semiconductor Corp. All rights reserved. Functional Description The PE3240 consists of a prescaler, counters, a phase detector and control logic. The dual modulus prescaler divides the VCO frequency by either 10 or 11, depending on the value of the modulus select. Counters “R” and “M” divide the reference and prescaler output, respectively, by integer values stored in a 20-bit register. An additional counter (“A”) is used in the modulus select logic. The phase-frequency detector generates up and down frequency control signals. Data is written into the internal registers via the three wire serial bus. There are also various operational and test modes and a lock detect output. Figure 6. Functional Block Diagram Control Logic Modulus Select 10/11 Prescaler M Counter (9-bit) R Counter (6-bit) Phase Detector 2 k Ω PD_U PD_D LD Cext R(5:0) M(8:0) A(3:0) Sdata Control Pins fr Fin Fin fc fp |
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