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PE4124 Datasheet(PDF) 2 Page - Peregrine Semiconductor Corp. |
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PE4124 Datasheet(HTML) 2 Page - Peregrine Semiconductor Corp. |
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2 / 8 page  Product Specification PE4124 Page 2 of 8 ©2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0043-04 │ UltraCMOS™ RFIC Solutions Table 2. Pin Descriptions Table 3. Absolute Maximum Ratings Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Figure 3. Pin Configuration (Top View) Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. PE4124 5 6 7 8 4 3 2 1 GND RF GND LO GND IF2 IF1 GND Pin No. Pin Name Description 1 LO LO Input 2 GND Ground connection for Mixer. Traces should be physically short and connect immediately to ground plane for best performance. 3 RF RF Input 4 GND Ground. 5 GND Ground. 6 IF2 IF differential output 7 IF1 IF differential output 8 GND Ground. Symbol Parameter/Conditions Min Max Units TST Storage temperature range -65 150 °C TOP Operating temperature range -40 85 °C PLO LO input power 20 dBm PRF RF input power 16 dBm VESD ESD Sensitive Device 250 V |
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