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4256-02 Datasheet(PDF) 3 Page - Peregrine Semiconductor Corp. |
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4256-02 Datasheet(HTML) 3 Page - Peregrine Semiconductor Corp. |
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3 / 8 page  Product Specification PE4256 Page 3 of 8 Document No. 70-0144-04 │ www.psemi.com ©2010-2011 Peregrine Semiconductor Corp. All rights reserved. Table 5. RF Path Truth Table Table 6. Termination Truth Table Notes: 1. The operation of the PE4256 is not supported or characterized in the C1 = VDD and C2 = VDD state. 2. "X" denotes termination enabled. C1 C2 RFC – RF1 RFC – RF2 Low Low OFF OFF Low High OFF ON High Low ON OFF High High N/A1 N/A1 C1 C2 RFC – 75 Ω RF1 – 75 Ω RF2 – 75 Ω Low Low X2 X2 X2 Low High X2 High Low X2 High High N/A1 N/A1 N/A1 Switching Frequency The PE4256 has a maximum 25 kHz switching rate when the internal negative voltage generator is used (pin 18 = GND). Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. |
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