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42660-99 Datasheet(PDF) 4 Page - Peregrine Semiconductor Corp. |
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42660-99 Datasheet(HTML) 4 Page - Peregrine Semiconductor Corp. |
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4 / 9 page  Preliminary Specification PE42660 Page 4 of 9 ©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0192-02 │ UltraCMOS™ RFIC Solutions Evaluation Kit The SP6T Evaluation Kit board was designed to ease customer evaluation of the PE42660 RF switch. The PE42660 has two high power TX ports and four high isolation RX ports. The TX ports are symmetric and are designed as paths for the 850, 900, 1800, or 1900 MHz bands. The RX ports are also symmetric and can be assigned to any of these frequency bands. The ANT port connects through a 50 Ω transmission line to the top SMA connector, J1. The RX and TX ports connect through 50 Ω transmission lines to SMA connectors J2 – J7. A through 50 Ω transmission line between SMA connectors J9 and J10 allows estimation of the PCB losses over environmental conditions. An open transmission line connected to J11 is also provided. J8 supplies DC power to the pin marked VDD and the bottom row of pins, which is GND. 1 M Ω pull-up resistors are connected from VDD to each of the three control logic inputs: V1, V2, and V3. These pull-up resistors are provided for ease of evaluation on this board and are not required for the PE42660 to operate. Adding a jumper between a control pin and the adjacent GND pin on the bottom row of J8 will set a logic-0 on that control pin. Removing the jumper will set a logic-1. To evaluate the PE42660, add or remove jumpers according to the truth table in Table 5. Figure 4. Evaluation Board Layout ANT RX1 RX2 RX3 RX4 TX1 TX2 Open Line Through-Line Figure 5. Evaluation Board Schematic Peregrine Specification 101/0205 Peregrine Specification 102/0267 |
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