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PE83513 Datasheet(PDF) 4 Page - Peregrine Semiconductor Corp.

Part # PE83513
Description  DC - 1500 MHz Low Power CMOS Divide-by-8 Prescaler
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Manufacturer  PEREGRINE [Peregrine Semiconductor Corp.]
Direct Link  http://www.peregrine-semi.com
Logo PEREGRINE - Peregrine Semiconductor Corp.

PE83513 Datasheet(HTML) 4 Page - Peregrine Semiconductor Corp.

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PE83513
Product Specification
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0118~02A
| UTSi  CMOS RFIC SOLUTIONS
Page 4 of 6
VDD
IN
N/C
GND
GND
OUT
CTL
OUT /
C2
1000 pF
J2-7
J3
J4
J5
C10
10 pF
C3
1000pF
J1
C1
1000pF
C4
1000pF
Figure 7. Evaluation Board Schematic Diagram
Figure 8. Evaluation Board Layout
Evaluation Kit Operation
The PE83513 EK board was designed to ease
customer evaluation of Peregrine’s high
performance divide-by-8 Military Grade Prescaler.
On this board, the device input (pin 2) is connected
via J1 and a 50Ω transmission line. A series
capacitor (C3) provides the necessary DC block for
the device input. It is important to note that the
value of this capacitance will impact the
performance of the device. A value of 1000pF was
found to be optimal for this board layout; other
applications may require a different value.
The device output (pin 7) is connected to connector
J3 through a 50Ω transmission line. A series
capacitor (C1) provides the necessary DC block for
the device output. Note that this capacitor must be
chosen to have low impedance at the desired
output frequency the device. The value of 1000pF
was chosen to provide a wide operating range for
the evaluation board.
The board is constructed of a two-layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide above
ground plane model with trace width of 0.030”, trace
gaps of 0.007”, dielectric thickness of 0.028”, metal
thickness of 0.0014” and εr of 4.4. Note that the
predominate mode for these transmission lines is
coplanar waveguide.
J2 provides DC power to the device. Starting from
the lower left pin, the second pin to the right (J2-3)
is connected to the device VDD pin (1). Two
decoupling capacitors (10 pF, 1000 pF) are
included on this trace. It is the responsibility of the
customer to determine proper supply decoupling for
their design application.
Applications Support
If you have a problem with your evaluation kit or if
you have applications questions call (858) 455-0660
and ask for applications support. You may also
contact us by fax or e-mail:
Fax: (858) 455-0770
E-Mail: help@peregrine-semi.com
PE83513


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