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HDLY-3416 Datasheet(PDF) 10 Page - Agilent(Hewlett-Packard) |
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HDLY-3416 Datasheet(HTML) 10 Page - Agilent(Hewlett-Packard) |
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10 / 12 page  10 strobing the blank input). All of these blanking modes affect only the output drivers, maintaining the contents and write capability of the internal RAMs and Control Register, so that normal loading of RAMs and Control Register can take place even with the display blanked. Figure 3 shows how the Extended Function Disable (bit D 6 of the Control Register), Master Blank (bit D 2 of the Control Register), Digit Blank Disable (bit D 1 of the Attribute RAM), and BL input can be used to blank the display. When the Extended Function Disable is a logic 1, the display can be blanked only with the BL input. When the Extended Function Disable is a logic 0, the display can be blanked through the BL input, the Master Blank, and the Digit Blank Disable. The entire display will be blanked if either the BL input is logic 0 or the Master Blank is logic 1, pro- viding all Digit Blank Disable bits are logic 0. Those digits with Digit Blank Disable bits a logic 1 will ignore both blank signals and remain ON. The Digit Blank Disable bits allow individual characters to be blanked or flashed in synchronization with the BL input. Table 1. Current Requirements at Different Brightness Levels Symbol D5 D4 D3 Brightness 25 °C Typ. 25 °C Max. Max. over Temp. Units IDD(#) 0 0 0 100% 110 130 160 mA 0 0 1 60% 66 79 98 mA 0 1 0 40% 45 53 66 mA 0 1 1 27% 30 37 46 mA 1 0 0 17% 20 24 31 mA 1 0 1 10% 12 15 20 mA 110 7% 9 11 15 mA 111 3% 4 6 9 mA EFD MB DBDn BL 00 00 00 X 1 0X 1 0 01 0 X 01 11 1X X0 1X X1 –Display Blanked by BL –Display ON –Display Blanked by BL. Individual Characters “ON” based on “1” being stored in DBDn –Display Blanked by MB –Display Blanked by MB. Individual characters “ON” based on “1” being stored in DBDn –Display Blanked by BL –Display ON Dimming Dimming of the display is con- trolled through either the BL input or the Control Register. A pulse width modulated signal can be applied to the BL input to dim the display. A three bit word in the Control Register generates an internal pulse width modulated signal to dim the display. The internal dimming feature is enabled only if the Extended Function Disable is a logic 0. Figure 3. Display Blanking Truth Table. Bits 3–5 in the Control Register provide internal brightness control. These bits are interpreted as a three bit binary code, with code (000) corresponding to the maximum brightness and code (111) to the minimum brightness. In addition to varying the display brightness, bits 3–5 also vary the average value of I DD. IDD can be specified at any brightness level as shown in Table 1. |
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