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MSM54C865-10 Datasheet(PDF) 9 Page - OKI electronic componets

Part # MSM54C865-10
Description  65,536-Word X 8-Bit Multiport DRAM
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Manufacturer  OKI [OKI electronic componets]
Direct Link  http://www.oki.com
Logo OKI - OKI electronic componets

MSM54C865-10 Datasheet(HTML) 9 Page - OKI electronic componets

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Notes:
1. These parameters depend on output loading. Specified values are obtained with the
output open.
2. These parameters are masured at minimum cycle test.
3. ICC2 (Max.) are mesured under the condition of TTL input level.
4. VIH (Min.) and VIL (Max.) are reference levels for measuring timing of input signals.
Also, transition times are measured between VIH and VIL.
5. An initial pause of 200 ms is required after power-up followed by any 8 RAS cycles
(DT/OE “high”) and any 8 SC cycles before proper divice operation is achieved. In
the case of using an internal refresh counter, a minimum of 8 CAS before RAS
initialization cycles in stead of 8 RAS cycles are required.
6. AC measurements assume tT = 5 ns.
7. RAM port outputs are mesured with a load equivalent to 1 TTL load and 100 pF.
Output reference levels are VOH/VOL = 2.4 V/1.0 V.
8. SAM port outputs are measured with a load equivalent to 1 TTL load and 30 pF.
Output reference levels are VOH/VOL = 2.0 V/1.0 V.
9. tOFF (Max.), tOEZ (Max.), tSDZ (Max.) and tSEZ (Max.) difine the time at which the
outputs achieve the open circuit condition and are not reference to output voltage
levels.
10. Either tRCH or tRRH must be satisfied for a read cycle.
11. These parameters are referenced to CAS leading edge of early write cycles and to
WB/WE leading edge in OE controlled write cycles and read modify write cycles.
12. tWCS, tRWD, tCWD and tAWD are not restrictive operating parameters. They are
included in the data sheet as electrical characteristics only.
If tWCS ≥ tWCS (Min.), the cycle is an early write cycle, and the data out pin will
remain open circuit (high impedance) throughout the entire cycle : If tRWD ≥ tRWD
(Min.), tCWD ≥ tCWD (Min.) and tAWD ≥ tAWD (Min.) the cycle is a read-write cycle
and the data out will contain data read from the selected cell : If neither of the above
sets of conditions is satisfied, the condition of the data out (at access time) is
indterminate.
13. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met. tRCD
(Max.) is specified as a reference point only : If tRCD is greater than the specified tRCD
(Max.) limit, then access time is controlled by tCAC.
14. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD
(Max.) is specified as a reference point only : If tRAD is greater than the specified tRAD
(Max.) limit, then access time is controlled by tAA.
15. Input levels at the AC parameter measurement are 3.0 V/0 V.
16. Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permenent damege to the device.
17. All voltages are referenced to VSS.


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