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M5M5V5A36GP Datasheet(PDF) 11 Page - Renesas Technology Corp |
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M5M5V5A36GP Datasheet(HTML) 11 Page - Renesas Technology Corp |
11 / 19 page Renesas LSIs M5M5V5A36GP-75,85 18874368-BIT(524288-WORD BY 36-BIT) Flow-Through NETWORK SRAM 11/19 Preliminary M5M5V5A36GP-75,85 REV.1.0 AC ELECTRICAL CHARACTERISTICS (Ta=0~70°C, VDD=3.135~3.465V, unless otherwise noted) (1)MEASUREMENT CONDITION Input pulse levels ········································ VIH=VDDQ, VIL=0V Input rise and fall times ······························· faster than or equal to 1V/ns Input timing reference levels ······················· VIH=VIL=0.5*VDDQ Output reference levels ·······························VIH=VIL=0.5*VDDQ Output load ·················································· Fig.1 Note21.Valid Delay Measurement is made from the VDDQ/2 on the input waveform to the VDDQ/2 on the output waveform. Input waveform should have a slew rate of faster than or equal to 1V/ns. Note22.Tri-state toff measurement is made from the VDDQ/2 on the input waveform to the output waveform moving 20% from its initial to final Value VDDQ/2. Note:the initial value is not VOL or VOH as specified in DC ELECTRICAL CHARACTERISTICS table. Note23. Tri-state ton measurement is made from the VDDQ/2 on the input waveform to the output waveform moving 20% from its initial Value VDDQ/2 to its final Value. Note:the final value is not VOL or VOH as specified in DC ELECTRICAL CHARACTERISTICS table. Note24.Clocks,Data,Address and control signals will be tested with a minimum input slew rate of faster than or equal to 1V/ns. ZO=50 Ω 50 Ω Q VT=0.5*VDDQ 30pF (Including wiring and JIG) Fig.1 Output load VDDQ / 2 VDDQ / 2 tplh tphl Input Waveform Output Waveform VDDQ / 2 Input Waveform Vh-(0.2(Vh-Vz)) Vz+(0.2(Vh-Vz)) 0.2(Vz-Vl) Vz-(0.2(Vz-Vl)) toff ton Vz (toff) (ton) Vh Vl Output Waveform Fig.2 Tdly measurement Fig.3 Tri-State measurement |
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