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MSM514102D-70SJ Datasheet(PDF) 1 Page - OKI electronic componets |
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MSM514102D-70SJ Datasheet(HTML) 1 Page - OKI electronic componets |
1 / 18 page 1/17 ¡ Semiconductor MSM514102D/DL DESCRIPTION The MSM514102D/DL is a 4,194,304-word ¥ 1-bit dynamic RAM fabricated in Oki's silicon-gate CMOS technology. The MSM514102D/DL achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/ single-layer metal CMOS process. The MSM514102D/DL is available in a 26/20-pin plastic SOJ, 20- pin plastic ZIP, or 26/20-pin plastic TSOP. The MSM514102DL (the low-power version) is specially designed for lower-power applications. FEATURES • 4,194,304-word ¥ 1-bit configuration • Single 5 V power supply, ±10% tolerance • Input : TTL compatible, low input capacitance • Output : TTL compatible, 3-state • Refresh : 1024 cycles/16 ms, 1024 cycles/128 ms (L-version) • Static Column mode, read modify write capability • CS before RAS refresh, hidden refresh, RAS-only refresh capability • Multi-bit test mode capability • Package options: 26/20-pin 300 mil plastic SOJ (SOJ26/20-P-300-1.27) (Product : MSM514102D/DL-xxSJ) 20-pin 400 mil plastic ZIP (ZIP20-P-400-1.27) (Product : MSM514102D/DL-xxZS) 26/20-pin 300 mil plastic TSOP (TSOPII26/20-P-300-1.27-K) (Product : MSM514102D/DL-xxTS-K) xx indicates speed rank. PRODUCT FAMILY MSM514102D/DL-80 80 ns 150 ns 110 ns 385 mW 495 mW 5.5 mW/ Family Access Time (Max.) Cycle Time (Min.) Standby (Max.) Power Dissipation MSM514102D/DL-60 tRAC 60 ns 40 ns tAA 30 ns 20 ns tCAC 15 ns MSM514102D/DL-70 70 ns 130 ns 440 mW 35 ns 20 ns Operating (Max.) 1.1 mW (L-version) E2G0149-29-41 ¡ Semiconductor MSM514102D/DL 4,194,304-Word ¥ 1-Bit DYNAMIC RAM : STATIC COLUMN MODE TYPE This version: Apr. 1999 |
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